Ministry of Education
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Dr Anuj Grover

vidwan id: 105051
Male

Associate Professor, Department of Electronics and Communication Engineering
Indraprastha Institute of Information Technology Delhi (IIIT Delhi)

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Expertise

  • Computer Science Hardware and Architecture

Publications

Total Articles 55
Books 0
Proceedings 0

Publications

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Scopus

Citations 381
h-index 9

CrossRef

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Citations 269
h-index 7
Google Scholar

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Professional Recognition

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Community & Membership

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IEEE - Circuits and System Society - Delhi Chapter

2021
Secretary

IEEE

2020
Senior Member

Bio

Ultra Low Power In-Memory Compute for edge computing and machine learning applications, Safety and security in hardware,Error resilient energy efficient systems.

Personal Details

  • Male
  • Associate Professor , Indraprastha Institute of Information Technology Delhi (IIIT Delhi)
  • Indraprastha Institute of Information Technology Delhi, Okhla Industrial Estate, Phase III, New Delhi
Ph.D
Other Institute 2015
Associate Professor Jan 2020 – Present
Indraprastha Institute of Information Technology Delhi (IIIT Delhi) | Department of Electronics and Communication Engineering
Assistant Professor Feb 2019 – Dec 2019
Indraprastha Institute of Information Technology Delhi (IIIT Delhi) | Department of Electronics and Communication Engineering
Teaching Assistant Jun 2003 – Dec 2003
University of California, San Diego, U.S.A.
Research Associate Sep 2002 – May 2003
University of California, San Diego, U.S.A.

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Scholarly Work

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Design for Test in Advanced Automotive SoCs

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Year 2019
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Scholarly Publications

Scan Chain Adaptation through ECO

Open Access
Conference Paper
Year: 2016. Pages: 107-112 .
Authors: Pathak S.;Grover A.;Singh J.;Pohit M.;Baghel A.;Kaur G.
DOI 10.1109/ATS.2016.16
1

A New Sense Amplifier Topology with Improved Performance for High Speed SRAM Applications

Open Access
Conference Paper
Year: 2016. Volume: 2016-March , Pages: 185-190 .
Authors: Gundu A.K.;Hashmi M.S.;Grover A.
DOI 10.1109/VLSID.2016.38
2 7

Static noise margin based yield modelling of 6T SRAM for area and minimum operating voltage improvement using recovery techniques

Open Access
Conference Paper
Year: 2016. Volume: 18-20-May-2016 , Pages: 117-120 .
Authors: Batra N.;Sehgal P.;Kaushik S.;Hashmi M.;Bhalla S.;Grover A.
DOI 10.1145/2902961.2903005
4 5

Floorplan and congestion aware framework for optimal SRAM selection for memory subsystems

Open Access
Conference Paper
Year: 2016. Volume: 2016-February , Pages: 105-110 .
Authors: Narang G.;Fell A.;Gupta P.R.;Grover A.
DOI 10.1109/SOCC.2015.7406922
2 2

A method to estimate effectiveness of weak bit test: Comparison of weak pMOS and WL boost based test - 28nm FDSOI implementation

Open Access
Conference Paper
Year: 2016. Pages: 47-51 .
Authors: Batra N.;Kaushik S.;Gundu A.K.;Hashmi M.S.;Visweswaran G.S.;Grover A.
DOI 10.1109/SOCC.2016.7905432
1 1

Heterogeneous memory assembly exploration using a floorplan and interconnect aware framework

Open Access
Conference Paper
Year: 2016. Pages: 290-295 .
Authors: Gupta P.R.;Visweswaran G.S.;Narang G.;Grover A.
DOI 10.1109/SOCC.2016.7905494
1 2

Comparative analysis of SRAM cells in sub-threshold region in 65nm

Open Access
Conference Paper
Year: 2015. Pages: 609-613 .
Authors: Madan R.;Gupta R.;Nirwan B.S.;Grover A.
DOI 10.1109/ICACEA.2015.7164763
7 9

Area compact 5T portless SRAM cell for high density cache in 65nm CMOS

Open Access
Conference Paper
Year: 2015.
Authors: Yadav J.;Das P.;Jain A.;Grover A.
DOI 10.1109/ISVDAT.2015.7208095
7 9