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Dr G S Visweswaran

vidwan id: 105057
Male

,

Expertise

  • Telecommunications

Publications

Total Articles 48
Books 0
Proceedings 0

Publications

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Scopus

Citations 287
h-index 9

CrossRef

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Citations 204
h-index 7
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Bio

CAD of VLSI, Design of Digital, Analog and Mixed Signal VLSI Circuits

Personal Details

  • Male
  • Indraprastha Institute of Information Technology Delhi, Okhla Industrial Estate, Phase III, New Delhi
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Visiting Faculty Jul 2018 – Jun 2022
Indraprastha Institute of Information Technology Delhi (IIIT Delhi) | Department of Electronics and Communication Engineering

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Co-Authors (11)

Anshul

Prof Anshul Kumar

Indian Institute of Technology Delhi

Anuj

Dr Anuj Grover

Indraprastha Institute of Information Technology Delhi (IIIT Delhi)

B.

Prof B. Bhaumik

Indian Institute of Technology Delhi

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Scholarly Work

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Scholarly Publications

Design and Analysis of Voltage Control Function Generator Using Highly Linear CCII

Open Access
Conference Paper
Authors: Shweta Kumari ., G. S. Visweswaran ., Lily Kumari .,

A 0.8V V<inf>MIN</inf>ultra-low leakage high density 6T SRAM in 40nm CMOS technology using repeated-pulse wordline suppression scheme

Open Access
Conference Paper
Authors: Kumar, Ashish;Alam, Mohammad Aftab;Visweswaran, G. S.

A 0.6V Retention VMIN Ultra-Low Leakage High Density 6T SRAM in 40nm CMOS Technology Using Adaptive Source Bias

Open Access
Conference Paper

Charge-Controlled Oscillators and Their Application in Frequency Synthesis

Open Access
Article

A 32 kb 0.35-1.2 V, 50 MHz-2.5 GHz Bit-Interleaved SRAM with 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS

Open Access
Article
Authors: Grover A.;Visweswaran G.S.;Parthasarathy C.R.;Daud M.;Turgis D.;Giraud B.;Noel J.P.;Miro-Panades I.;Moritz G.;Beigne E.;Flatresse P.;Kumar P.;Azmi S.

An effective test methodology enabling detection of weak bits in SRAMs: Case study in 28nm FDSOI

Open Access
Conference Paper
Authors: Batra N.;Gundu A.K.;Hashmi M.S.;Visweswaran G.S.;Grover A.

Impact of crosstalk and process variation on capture power reduction for at-speed test

Open Access
Conference Paper
Authors: Piplani S.;Visweswaran G.S.;Kumar A.

Heterogeneous memory assembly exploration using a floorplan and interconnect aware framework

Open Access
Conference Paper
Authors: Gupta P.R.;Visweswaran G.S.;Narang G.;Grover A.