Ministry of Education
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Dr Anuj Grover

vidwan id: 105051
Male

Associate Professor, Department of Electronics and Communication Engineering
Indraprastha Institute of Information Technology Delhi (IIIT Delhi)

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Expertise

  • Computer Science Hardware and Architecture

Publications

Total Articles 55
Books 0
Proceedings 0

Publications

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Scopus

Citations 381
h-index 9

CrossRef

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Citations 269
h-index 7
Google Scholar

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Professional Recognition

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Community & Membership

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IEEE - Circuits and System Society - Delhi Chapter

2021
Secretary

IEEE

2020
Senior Member

Bio

Ultra Low Power In-Memory Compute for edge computing and machine learning applications, Safety and security in hardware,Error resilient energy efficient systems.

Personal Details

  • Male
  • Associate Professor , Indraprastha Institute of Information Technology Delhi (IIIT Delhi)
  • Indraprastha Institute of Information Technology Delhi, Okhla Industrial Estate, Phase III, New Delhi
Ph.D
Other Institute 2015
Associate Professor Jan 2020 – Present
Indraprastha Institute of Information Technology Delhi (IIIT Delhi) | Department of Electronics and Communication Engineering
Assistant Professor Feb 2019 – Dec 2019
Indraprastha Institute of Information Technology Delhi (IIIT Delhi) | Department of Electronics and Communication Engineering
Teaching Assistant Jun 2003 – Dec 2003
University of California, San Diego, U.S.A.
Research Associate Sep 2002 – May 2003
University of California, San Diego, U.S.A.

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Scholarly Work

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Design for Test in Advanced Automotive SoCs

University Gautam Buddh University
Year 2019
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Scholarly Publications

Design of High Density Memory Cell Library for Low Voltage Operation in 65nm LSTP Technology

Open Access
Conference Paper
Year: 2021.
Authors: Saxena A.;Bansal S.;Sharma D.;Kumari P.;Singh S.K.;Kapil P.;Iqbal B.;Grover A.
DOI 10.1109/INDICON52576.2021.9691642
2 3

Process Compensated Diagnostic Circuit For Impending Fault Detection In SRAM Write Drivers

Open Access
Conference Paper
Year: 2021. Pages: 185-188 .
Authors: Bansal S.;Grover A.
DOI 10.1109/APCCAS51387.2021.9687764

ChaCha20-in-Memory for Side-Channel Resistance in IoT Edge-Node Devices

Open Access
Article
IEEE Open Journal of Circuits and Systems. Year: 2021. Volume: 2 , Pages: 833-842 .
Authors: Aamir M.;Sharma S.;Grover A.
DOI 10.1109/OJCAS.2021.3127273
8 10

Reduced March iC-Test for Detecting Ageing Induced Faults in Memory Address Decoders

Open Access
Conference Paper
Year: 2021. Volume: 2021-February , Pages: 193-198 .
Authors: Anjali K.;Saha S.;Grover A.
DOI 10.1109/VLSID51830.2021.00038
3

A 0.4µA Offset, 6ns Sensing-time Multi-level Sense Amplifier for Resistive Non-Volatile Memories in 65nm LSTP Technology

Open Access
Conference Paper
Year: 2021. Volume: 2021-February , Pages: 76-81 .
Authors: Husain F.;Iqbal B.;Grover A.
DOI 10.1109/VLSID51830.2021.00018
4 7

AXI Based Three 8-bit Parallel Input to One Serial Output Converter with Priority Management System and Asynchronous Clocks at Input and Output

Open Access
Conference Paper
Year: 2020.
Authors: Agrawal M.;Videkar J.S.;Grover A.
DOI 10.1109/INDICON49873.2020.9342414

Actively Compensated Read Assist Technique for 0.6 v Operation of 16 Mb High Density SRAM in 65nm LSTP

Open Access
Conference Paper
Year: 2020.
Authors: Iqbal B.;Arij M.;Bansal T.;Grover A.
DOI 10.1109/INDICON49873.2020.9342058
1 2

300MHz to 500MHz Optimization of ARM Cortex M7 for Sensor Fusion SoCs by using Multi-threshold Libraries and Multi-bit Register cells in 16nm FinFET

Open Access
Conference Paper
Year: 2020.
Authors: Gupta N.;Grover A.
DOI 10.1109/INDICON49873.2020.9342063