Ministry of Education
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Dr Anuj Grover

vidwan id: 105051
Male

Associate Professor, Department of Electronics and Communication Engineering
Indraprastha Institute of Information Technology Delhi (IIIT Delhi)

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Expertise

  • Computer Science Hardware and Architecture

Publications

Total Articles 55
Books 0
Proceedings 0

Publications

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Scopus

Citations 381
h-index 9

CrossRef

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Citations 269
h-index 7
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Professional Recognition

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Community & Membership

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IEEE - Circuits and System Society - Delhi Chapter

2021
Secretary

IEEE

2020
Senior Member

Bio

Ultra Low Power In-Memory Compute for edge computing and machine learning applications, Safety and security in hardware,Error resilient energy efficient systems.

Personal Details

  • Male
  • Associate Professor , Indraprastha Institute of Information Technology Delhi (IIIT Delhi)
  • Indraprastha Institute of Information Technology Delhi, Okhla Industrial Estate, Phase III, New Delhi
Ph.D
Other Institute 2015
Associate Professor Jan 2020 – Present
Indraprastha Institute of Information Technology Delhi (IIIT Delhi) | Department of Electronics and Communication Engineering
Assistant Professor Feb 2019 – Dec 2019
Indraprastha Institute of Information Technology Delhi (IIIT Delhi) | Department of Electronics and Communication Engineering
Teaching Assistant Jun 2003 – Dec 2003
University of California, San Diego, U.S.A.
Research Associate Sep 2002 – May 2003
University of California, San Diego, U.S.A.

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Scholarly Work

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Design for Test in Advanced Automotive SoCs

University Gautam Buddh University
Year 2019
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Scholarly Publications

AXI Based Three 8-bit Parallel Input to One Serial Output Converter with Priority Management System and Asynchronous Clocks at Input and Output

Open Access
Conference Paper
Year: 2020.
Authors: Agrawal M.;Videkar J.S.;Grover A.
DOI 10.1109/INDICON49873.2020.9342414

300MHz to 500MHz Optimization of ARM Cortex M7 for Sensor Fusion SoCs by using Multi-threshold Libraries and Multi-bit Register cells in 16nm FinFET

Open Access
Conference Paper
Year: 2020.
Authors: Gupta N.;Grover A.
DOI 10.1109/INDICON49873.2020.9342063

Actively Compensated Read Assist Technique for 0.6 v Operation of 16 Mb High Density SRAM in 65nm LSTP

Open Access
Conference Paper
Year: 2020.
Authors: Iqbal B.;Arij M.;Bansal T.;Grover A.
DOI 10.1109/INDICON49873.2020.9342058
1 2

Design and Benchmark of Iso-Stable High Density 4T SRAM cells for 64MB arrays in 65nm LSTP

Open Access
Conference Paper
Year: 2020.
Authors: Kumar R.;Baunthiyal S.;Tewari R.;Siva Ganesh D.V.;Chandre Gowda A.T.;Yadav R.;Grover A.
DOI 10.1109/INDICON49873.2020.9342091
5 6

A 800MHz, O.21pJ, 1.2V to 6V Level Shifter Using Thin Gate Oxide Devices in 65nm LSTP

Open Access
Conference Paper
Year: 2020.
Authors: Shukla P.;Singh P.;Maheshwari T.;Grover A.;Rana V.
DOI 10.1109/ICECS49266.2020.9294984
1 1

Design of sense amplifier for wide voltage range operation of split supply memories in 22nm HKMG CMOS technology

Open Access
Conference Paper
Year: 2020. Pages: 37-42 .
Authors: Patil V.;Grover A.;Parashar A.
DOI 10.1109/VLSID49098.2020.00024
5 8

Diagnostic Circuit for Latent Fault Detection in SRAM Row Decoder

Open Access
Conference Paper
Year: 2020. Volume: 2020-March , Pages: 395-400 .
Authors: Singh S.;Gupta V.;Grover A.;Dhori K.J.
DOI 10.1109/ISQED48828.2020.9136968
2 5

Design Benchmark of Single Bit Multi Bit Sequential Elements in 65nm for Low Standby Power Consumption

Open Access
Conference Paper
Year: 2020.
Authors: Dwivedi S.N.;Seth A.K.;Grover A.
DOI 10.1109/VDAT50263.2020.9190213
3 3