Ministry of Education
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Prof Abhinav Kranti

vidwan id: 49414
Male

Professor, Department of Electrical Engineering
Indian Institute of Technology Indore

Orchid Icon 0000-0003-1760-3409 Google Scholar Icon 6701717892

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 198
Books 0
Proceedings 0

Publications

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Scopus

Citations 3831
h-index 34

CrossRef

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Citations 3272
h-index 30
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Professional Recognition

2001

Senior Research Fellowship

Council of Scientific and Industrial Research (CSIR), India

Community & Membership

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Bio

Solid-State Devices, Circuit Design and Nanotechnology Semiconductor Devices: Physics, Simulation and Modeling Novel MOS devices (single and multi-gate) in Bulk/SOI technology

Personal Details

  • Male
  • Professor , Indian Institute of Technology Indore
  • Flat No. 303, GIRNAR JI Apartments, A-318, Silicon City, Silicon City
PhD
Other Institute 2001
Professor Dec 2017 – Present
Indian Institute of Technology Indore | Department of Electrical Engineering
Associate Professor Nov 2010 – Dec 2017
Indian Institute of Technology Indore | Department of Electrical Engineering

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Scholarly Work

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Scholarly Publications

Source/drain extension region engineering in FinFETs for low-voltage analog applications

Open Access
Article
IEEE Electron Device Letters. Year: 2007. Volume: 28 , Issue: 2 , Pages: 139-141 .
Authors: Kranti A.;Armstrong G.
DOI 10.1109/LED.2006.889239
79 86

Performance assessment of nanoscale multiple gate MOSFETs (MuGFETs) for RF applications

Open Access
Conference Paper
Year: 2006. Pages: 308-311 .
Authors: Lim T.C.;Kranti A.;Armstrong G.A.
DOI 10.1109/EMICC.2006.282814
1 1

Source/drain extension region engineering in nanoscale double gate MOSFETs for low-voltage analog applications

Open Access
Conference Paper
Year: 2006. Pages: 141-142 .
Authors: Kranti A.;Lim T.C.;Alastair Armstrong G.
DOI 10.1109/SOI.2006.284475
5 8

Compact model for short channel effects in source/drain engineered nanoscale Double Gate (DG) SOI MOSFETs

Open Access
Conference Paper
Year: 2006. Volume: 3 , Pages: 820-823 .
Authors: Kranti A.;Armstrong G.

Optimization of the source/drain extension region profile for suppression of short channel effects in sub-50 nm DG MOSFETs with high-κ gate dielectrics

Open Access
Article
Year: 2006. Volume: 21 , Issue: 12 , Pages: 1563-1572 .
Authors: Kranti A.;Armstrong G.
DOI 10.1088/0268-1242/21/12/011
28 32

Performance assessment of nanoscale double- and triple-gate FinFETs

Open Access
Article
Year: 2006. Volume: 21 , Issue: 4 , Pages: 409-421 .
Authors: Kranti A.;Armstrong G.
DOI 10.1088/0268-1242/21/4/002
80 89

Engineering source/drain extension regions in nanoscale double gate (DG) SOI MOSFETs: Analytical model and design considerations

Open Access
Article
Year: 2006. Volume: 50 , Issue: 3 , Pages: 437-447 .
Authors: Kranti A.;Alastair Armstrong G.
DOI 10.1016/j.sse.2006.02.012
64 68

Device design considerations for nanoscale double and triple gate FinFETs

Open Access
Conference Paper
Year: 2005. Volume: 2005 , Pages: 96-98 .
Authors: Kranti A.;Armstrong G.A.
DOI 10.1109/SOI.2005.1563549
8 26