Vidvan Image

Dr Manish Gupta

vidwan id: 244266
Male

Assistant Professor, Department of Electrical and Electronics engineering
Birla Institute of Technology and Science

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 30
Books 0
Proceedings 0

Publications

No publication activity to display at the moment.

Scopus

Citations 161
h-index 8

CrossRef

CrossRef Icon
Citations 133
h-index 6
Google Scholar

Loading Scholar statistics...

Professional Recognition

No Data Found

There is currently nothing to display here.

Community & Membership

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

Bio

Emerging Semiconductor Devices, Steep Switching Transistors, Ferroelectric Devices for Non-volatile Memory Applications Negative Capacitance Devices Biosensors

Personal Details

  • Male
  • Assistant Professor , Birla Institute of Technology and Science
  • K K Birla Goa Campus,NH 17 B, Zuarinagar
Ph.D
Indian Institute of Technology Indore 2019
Assistant Professor Oct 2021 – Present
Birla Institute of Technology and Science | Department of Electrical and Electronics engineering

Related Profiles

Experts (19623+)

View All
Pragati

Ms Pragati Mishra

Assistant Professor

Sridhar

Dr Sridhar Sekar

Assistant Professor

Md

Dr Md Nadeem M

Assistant Professor

Rashmi

Rashmi Chandra

Assistant Professor

Abhishek

Mr Abhishek Shukla

Assistant Professor (Grade-I)

N

Dr N PRAKASH

Assistant Professor

Mrinmoy

Mr Mrinmoy Sadhukhan

Research Scholar

Haranath

Mr Haranath Rakshit

Junior Research Fellow

Organisations (1053+)

View All

Co-Authors (1)

Abhinav

Prof Abhinav Kranti

Indian Institute of Technology Indore

Scholarly Work

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

Scholarly Publications

Sub-60 mV/Decade Dynamic Subthreshold Swing in Bulk Negative Capacitance Junctionless MOSFET

Open Access
Article

Extremely High Noise Margin and Low Leakage in ULP Circuits with NCFETs

Open Access
Conference Paper
Authors: Semwal S.;Nirala R.K.;Gupta M.;Kranti A.

Improved Process Induced Threshold Voltage Variability in Negative Capacitance Junctionless Transistors

Open Access
Conference Paper
Authors: Ruma S.R.;Hu V.P.H.;Gupta M.

Quantum Confinement Imposed Constraints in ULP Circuits with Junctionless FET

Open Access
Conference Paper
Authors: Semwal S.;Rai N.;Nirala R.K.;Gupta M.;Kranti A.

Energy and Disturbance Analysis of 1T-DRAM With Nanowire Gate-All-Around RFET

Open Access
Article

Improved Scalability of Negative Capacitance Junctionless Transistors With Underlap Design

Open Access
Article

Sensitivity Analysis of Ferroelectric Junctionless Transistors for Non-volatile Memory Applications

Open Access
Conference Paper

Influence of Channel Doping on Junctionless and Negative Capacitance Junctionless Transistors

Open Access
Article