Ministry of Education
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Prof Abhisek Dixit

vidwan id: 70121
Male

Professor, Department of Electrical Engineering
Indian Institute of Technology Delhi

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Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 124
Books 0
Proceedings 0

Publications

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Scopus

Citations 2014
h-index 23

CrossRef

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Citations 1156
h-index 16
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Professional Recognition

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Community & Membership

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Bio

Logic CMOS device design and characterization, CMOS variability, reliability and thermal-effects, Agressively scaled CMOS embedded DRAM (eDRAM) and SRAM cells, Compact device moldeing and process design kits (PDK), Modeling and characterization of Si solar-cells and modules

Personal Details

  • Male
  • Professor , Indian Institute of Technology Delhi
  • Indian Institute of Technology Delhi, Hauz Khas
Dr. Engg.
Other Institute 2007
Professor May 2021 – Present
Indian Institute of Technology Delhi | Department of Electrical Engineering
Associate Professor Oct 2013 – Nov -0001
Indian Institute of Technology Delhi | Department of Electrical Engineering

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Co-Authors (12)

Anil

Dr Anil Kottantharayil

Indian Institute of Technology Bombay

Bhaskar

Prof Bhaskar Mitra

Indian Institute of Technology Delhi

Yogesh Singh

Dr Yogesh Singh Chauhan

Indian Institute of Technology Kanpur

Manoj

Dr Manoj Kumar

CSIR-National Metallurgical Laboratory

Madhusudan

Prof Madhusudan Singh

Indian Institute of Technology Delhi

Pragya

Dr Pragya Kushwaha

Indian Institute of Technology Jodhpur

Rajan Kumar

Dr Rajan Kumar Pandey

Vellore Institute of Technology, Vellore

Ravikant

Dr Ravikant Saini

Indian Institute of Technology Jammu

Ramchandra

Dr Ramchandra Gurjar

Shri G. S. Institute of Technology & Science, Indore

Rajiv O

Dr Rajiv O Dusane

Indian Institute of Technology Bombay

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Prof V. Ramgopal Rao

Birla Institute of Technology and Science

Mohit

Dr Mohit Bajaj

Graphic Era University, Dehradun

Scholarly Work

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Scholarly Publications

Analytical Modeling of Parasitic Capacitance in Inserted-Oxide FinFETs

Open Access
Article
IEEE Transactions on Electron Devices. Year: 2017. Volume: 64 , Issue: 12 , Pages: 5274-5278 .
Authors: Singh R.;Gupta A.;Gupta C.;Bansal A.;Hook T.;Dixit A.
DOI 10.1109/TED.2017.2761984
5 11

Characterization and modeling of n-channel bulk FinFETs from DC to high frequency

Open Access
Conference Paper
Year: 2017. Volume: 2017-January , Pages: 1-2 .
Authors: Singh R.;Kushwaha P.;Ghosh S.;Parvais B.;Chauhan Y.S.;Dixit A.
DOI 10.1109/EDSSC.2017.8126567
3 3

Comparison of heat outflow in dense sub-14nm contemporary NFETs: Bulk/SOI, inserted-oxide FinFET and nanowire FET

Open Access
Conference Paper
Year: 2017.
Authors: Jain I.;Gupta A.;Bansal A.;Dixit A.;Hook T.
DOI 10.1109/ICEmElec.2016.8074418
2

7-nm Nanowire FET process variation modeling using industry standard BSIM-CMG model

Open Access
Conference Paper
Year: 2017.
Authors: Singh R.;Aditya K.;Bansal A.;Chanawala P.;Hook T.;Dixit A.
DOI 10.1109/ICEmElec.2016.8074417
4 5

Series resistance reduction in stacked nanowire FETs for 7-nm CMOS technology

Open Access
Article
IEEE Journal of the Electron Devices Society. Year: 2016. Volume: 4 , Issue: 5 , Pages: 266-272 .
Authors: Bansal A.K.;Jain I.;Hook T.B.;Dixit A.
DOI 10.1109/JEDS.2016.2592183
22 31

Nanowire FET design for 7-nm SOI-CMOS technology

Open Access
Conference Paper
Year: 2015.
Authors: Jain I.;Bansal A.;Dixit A.;Hook T.
DOI 10.1109/S3S.2015.7333509
3 3

Advances in logic device scaling

Open Access
Article
Year: 2015. Volume: 32 , Issue: 4 , Pages: 311-318 .
Authors: Bansal A.;Dixit A.
DOI 10.1080/02564602.2015.1023372
6 8

Impact of Fin Sidewall Taper Angle on Sub-14nm FinFET Device Performance

Open Access
Conference Paper
Year: 2014. Pages: 1-4 .
Authors: Dixit A.;Hook T.B.;Johnson J.B.;Nowak E.J.;Murali K.V.
DOI 10.1007/978-3-319-03002-9_1