Ministry of Education
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Dr Vijay H M

vidwan id: 358341
Male

Associate Professor, School of Electronics and Communication Engineering
KLE Technological University

Orchid Icon 0000-0003-1380-2486 Google Scholar Icon 57194339999 Researcher Icon AAC-6519-2022 Google Scholar Icon O7OVkZwAAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 18
Books 0
Proceedings 0

Publications

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Scopus

Citations 29
h-index 3

CrossRef

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Citations 16
h-index 2
Google Scholar

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Professional Recognition

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Community & Membership

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THE INSTITUTION OF ELECTRONICS AND TELECOMMUNICATION ENGINEERS

2010
MEMBER

THE INDIAN SOCIETY FOR TECHNICAL EDUCATION

2007
LIFE MEMBER

Bio

VLSI, Semiconductor Memory, single-event upset, ReRAM

Personal Details

  • Male
  • Associate Professor , KLE Technological University
  • KLE Technological University, Vidyanagar, Hubli
Ph.D
Other Institute 2023
M.Tech
Other Institute 2011
B.E
Other Institute 2005
Associate Professor Apr 2021 – Present
KLE Technological University | School of Electronics and Communication Engineering
Research Scholar Jul 2016 – Apr 2021
Vellore Institute of Technology, Vellore
Assistant Professor Jul 2014 – Jul 2016
JAIN INSTITUTE OF TECHNOLOGY, DAVANAGERE
Assistant Professor Aug 2006 – Dec 2012
Bapuji Institute of Engineering & Technology, DAVANAGERE
Assistant Professor Sep 2005 – Jan 2006
UBDT College of Engineering, Davanagere

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Co-Authors (6)

R M

Dr R M Banakar

KLE Technological University

Nalini C

Dr Nalini C Iyer

KLE Technological University

Ramakrishna

Dr Ramakrishna S

KLE Technological University

Saroja V

Dr Saroja V Siddamal

KLE Technological University

Suhas

Mr Suhas Shirol

KLE Technological University

Ramakrishnan

Dr Ramakrishnan Valayathoor Narayanan

Vellore Institute of Technology, Vellore

Scholarly Work

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Scholarly Publications

FPGA Implementation of Normal Basis Multiplier Using Reversible Logic

Open Access
Conference Paper
Year: 2024. Pages: 1688-1694 .
Authors: Pandimeena R.;Aathilakshmi S.;Vaheen D.M.;Vijay H.;Mridhullashree K.;Blessy Sam A.S.
DOI 10.1109/ICACCS60874.2024.10716911
1

GUI Implementation of Logic Built in Self-Test[LBIST]

Open Access
Conference Paper
Year: 2024.
Authors: Kademani R.;Shirol S.;Siddamal S.;Vijay H.M.;Rajeshwari M.
DOI 10.1109/INOCON60754.2024.10511846

FPGA implementation of energy efficient Vedic multiplier using CSA architecture

Open Access
Conference Paper
Year: 2023.
Authors: Aathilakshmi S.;Mugundan G.;Sanjay Kumar K.;Vaheen D.M.;Vijay H.;Dhenishaa V.N.
DOI 10.1109/ICSSS58085.2023.10407086
1

Analysis of RC delay using Multi level interconnects

Open Access
Conference Paper
Year: 2023.
Authors: Aathilakshmi S.;Vaheen D.M.;Vijay H.;Mugundan G.;Sanjay Kumar K.;Blessy Sam A.S.
DOI 10.1109/ICSSS58085.2023.10407093
2

A Novel Approach to Analyze the Resistance of the RRAM Based on the Conductive Nano Filament Length and Width Variation

Open Access
Article
Transactions on Electrical and Electronic Materials. Year: 2022. Volume: 23 , Issue: 5 , Pages: 476-482 .
Authors: Vijay H.M.;Ramakrishnan V.N.
DOI 10.1007/s42341-021-00374-5
1 3

Geometrical Variation of a Conductive Filament in RRAM and Its Impact on a Single-Event Upset

Open Access
Article
Year: 2022. Volume: 20 , Issue: 1 , Pages: 32-38 .
Authors: Vijay H.M.;Ramakrishnan V.N.
DOI 10.37936/ecti-eec.2022201.246101

Conductive Filament Variation of RRAM and Its Impact on Single Event Upset

Open Access
Article
Transactions on Electrical and Electronic Materials. Year: 2022. Volume: 23 , Issue: 3 , Pages: 247-253 .
Authors: Vijay H.M.;Ramakrishnan V.N.
DOI 10.1007/s42341-021-00343-y

A Novel Approach to Analyze Current-Voltage Characteristics of Double Gated-Memristor

Open Access
Conference Paper
Year: 2019. Pages: 194-197 .
Authors: Vijay H.M.;Ramakrishnan V.N.
DOI 10.1109/ICDCSyst.2018.8605149
2 4