Ministry of Education
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Dr Ramakrishna S

vidwan id: 408622
Male

Associate Professor, School of Electronics and Communication Engineering
KLE Technological University

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Expertise

  • Telecommunications

Publications

Total Articles 18
Books 0
Proceedings 0

Publications

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Scopus

Citations 56
h-index 5

CrossRef

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Citations 37
h-index 4
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Professional Recognition

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Bio

5G, Wireless Networks,

Personal Details

  • Male
  • Associate Professor , KLE Technological University
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Associate Professor Mar 2023 – Present
KLE Technological University | School of Electronics and Communication Engineering

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Co-Authors (19)

Raju

Mr Raju A B

KLE Technological University

Anoopkumar

Mr Anoopkumar Patil

KLE Technological University

Arun

Dr Arun Kakhandki

Karnataka Law Society's Vishwanathrao Deshpande Institute of Technology, HALIYAL  Dt: N.K.

B.L.

Prof B.L. Desai

KLE Technological University

Sanjay

Dr Sanjay Eligar

N/A

Gireesha

Mr Gireesha H M

KLE Technological University

Hemantaraj

Mr Hemantaraj Kelagadi

KLE Technological University

KSHITIJA

Ms KSHITIJA T

JAIN INSTITUTE OF TECHNOLOGY, DAVANAGERE

Venkatesh

Mr Venkatesh Mane

KLE Technological University

Nalini C

Dr Nalini C Iyer

KLE Technological University

Nikita

Nikita Patil

KLE Technological University

Prabhavathi

Prabhavathi Nissimagoudar

KLE Technological University

Priyatamkumar

Dr Priyatamkumar G

KLE Technological University

R B

Dr R B Shettar

KLE Technological University

Shamshuddin

Mr Shamshuddin K

KLE Technological University

Shashidhar

Mr Shashidhar Neelakanthmath

KLE Technological University

Soumya

Ms Soumya Patil

KLE Technological University

Suhas

Mr Suhas Shirol

KLE Technological University

Vijay

Dr Vijay H M

KLE Technological University

Scholarly Work

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Scholarly Publications

SCALABLE LOGIC BIST DESIGN AND ANALYSIS FOR ENHANCED TESTING OF COMBINATIONAL CIRCUITS

Open Access
Article
Proceedings on Engineering Sciences. Year: 2025. Volume: 7 , Issue: 2 , Pages: 1377-1386 .
Authors: Shirol S.;Shettar R.;Ramakrishna S.;Vijay H.M.
DOI 10.24874/PES07.02C.018

Reinforcement Learning for Energy Efficiency in 5G Networks with Built-In Self-Test Architecture

Open Access
Conference Paper
Year: 2025. Volume: 1254 , Pages: 253-264 .
Authors: Shirol S.B.;Ramakrishna S.;Shettar R.B.
DOI 10.1007/978-981-96-1744-9_22

Breaking Down Barriers: Investigating the Advantages and Challenges of Open RAN Deployment in Next-Generation Wireless Networks

Open Access
Conference Paper
Year: 2025. Volume: 1254 , Pages: 241-252 .
Authors: Ramakrishna S.;Iyer N.;Shirol S.B.
DOI 10.1007/978-981-96-1744-9_21

A novel design and implementation of 8-bit and 16-bit hybrid ALU

Open Access
Conference Paper
Year: 2020. Volume: 940 , Pages: 32-42 .
Authors: Shirol S.;Ramakrishna S.;Shettar R.
DOI 10.1007/978-3-030-16657-1_4
1

Design and implementation of 8-bit LFSR, Bit-Swapping LFSR and weighted random test pattern generator: A performance improvement

Open Access
Conference Paper
Year: 2019. Pages: 82-86 .
Authors: Bagalkoti A.;Shirol S.B.;Ramakrishna S.;Kumar P.;Rajashekar B.S.
DOI 10.1109/ISS1.2019.8908063
8 13

Analysis of PAPR for Performance QPSK and BPSK Modulation Techniques

Open Access
Conference Paper
Year: 2019. Volume: 882 , Pages: 621-627 .
Authors: Bhagyashree K.;Ramakrishna S.;Kumar P.
DOI 10.1007/978-981-13-5953-8_51
2

Implementation of Modified Array Multiplier for WiMAX Deinterleaver Address Generation

Open Access
Conference Paper
Year: 2019. Volume: 882 , Pages: 629-639 .
Authors: Nikita P.;Kakhandki A.;Ramakrishna S.;Kumar P.
DOI 10.1007/978-981-13-5953-8_52
2 2

Design and Implementation of Adders and Multiplier in FPGA Using ChipScope: A Performance Improvement

Open Access
Book Chapter
Year: 2019. Volume: 40 , Pages: 11-19 .
Authors: Shirol S.;Ramakrishna S.;Shettar R.
DOI 10.1007/978-981-13-0586-3_2
4 5