Ministry of Education
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Dr Jai Gopal Pandey

vidwan id: 215916
Male

Principal Scientist, Societal Electronics Group
Central Electronics Enginnering Research Institute

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Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 33
Books 0
Proceedings 0

Publications

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Scopus

Citations 206
h-index 9

CrossRef

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Citations 124
h-index 6
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Professional Recognition

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Community & Membership

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Bio

VLSI Design, High-Performance Architectures, System-on-Chips,Cryptography, Hardware Security, FPGA-based Designs

Personal Details

  • Male
  • Principal Scientist , Central Electronics Enginnering Research Institute
  • Central Electronics Engineering Research Institute, Pilani
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Principal Scientist Mar 2020 – Present
Central Electronics Enginnering Research Institute | Societal Electronics Group

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Co-Authors (8)

Abhijit

Dr Abhijit Karmakar

Indian Institute of Technology Jodhpur

Ambika Prasad

Dr Ambika Prasad Shah

Indian Institute of Technology Jammu

Chandra

Dr Chandra Shekhar

Birla Institute of Technology and Science

Chandra

Dr Chandra Shekhar

Birla Institute of Technology and Science

Gaurav

Dr Gaurav Dhiman

DIT University

S.

Dr S. Gurunarayanan

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Dr S Sheeba

Dr Dr S Sheeba Rani

Sri Eshwar College of Engineering

Santosh Kumar

Dr Santosh Kumar Vishvakarma

Indian Institute of Technology Indore

Scholarly Work

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Scholarly Publications

An efficient VLSI architecture for data encryption standard and its FPGA implementation

Open Access
Conference Paper
Year: 2016.
Authors: Pandey J.G.;Gurawa A.;Nehra H.;Karmakar A.
DOI 10.1109/VLSI-SATA.2016.7593054
3 11

An embedded framework for accurate object localization using center of gravity measure with mean shift procedure

Open Access
Conference Paper
Year: 2015.
Authors: Pandey J.G.;Karmakar A.;Shekhar C.;Gurunarayanan S.
DOI 10.1109/ISVDAT.2015.7208135
1 2

An FPGA-Based Architecture for Local Similarity Measure for Image/Video Processing Applications

Open Access
Conference Paper
Year: 2015. Volume: 2015-February , Issue: February , Pages: 339-344 .
Authors: Pandey J.G.;Karmakar A.;Shekhar C.;Gurunarayanan S.
DOI 10.1109/VLSID.2015.63
7 11

An FPGA-based novel architecture for the fixed-point binary antilogarithmic computation

Open Access
Conference Paper
Year: 2014. Pages: 23-28 .
Authors: Pandey J.G.;Karmakar A.;Shekhar C.;Gurunarayanan S.
DOI 10.1109/ICESC.2014.13
1 2

A Novel Architecture for FPGA Implementation of Otsu's Global Automatic Image Thresholding Algorithm

Open Access
conference-paper
Year: 2014. Pages: 300-305 .
Authors:
10

Implementation of an improved connected component labeling algorithm using FPGA-based platform

Open Access
Conference Paper
Year: 2014.
Authors: Pandey J.G.;Karmakar A.;Mishra A.K.;Shekhar C.;Gurunarayanan S.
DOI 10.1109/SPCOM.2014.6983911
4 7

Architectures and algorithms for image and video processing using FPGA-based platform

Open Access
Conference Paper
Year: 2014.
Authors: Pandey J.G.;Karmakar A.;Gurunarayanan S.
DOI 10.1109/ISVDAT.2014.6881081
1 2

An FPGA-based fixed-point architecture for binary logarithmic computation

Open Access
Conference Paper
Year: 2013. Pages: 383-388 .
Authors: Pandey J.G.;Karmakar A.;Shekhar C.;Gurunarayanan S.
DOI 10.1109/ICIIP.2013.6707620
10 9