Ministry of Education
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Dr Nilesh Patidar

vidwan id: 179252
Male

Assistant Professor, Department of Electrical and Electronics Engineering
Shri Vaishnav Vidyapeeth Vishwavidyalaya

Orchid Icon 0000-0001-8712-5938 Google Scholar Icon 57218212177 Researcher Icon MSX-4198-2025 Google Scholar Icon TUsK3LwAAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 14
Books 0
Proceedings 0

Publications

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Scopus

Citations 20
h-index 2

CrossRef

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Citations 0
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Professional Recognition

2013

Best Paper Award

Trans-stellar Journals (TJPRC)
2020

TBT-2020

e-Yantra, IIT Bombay
2020

Top in 5% Topper (Introduction to Embedded System Design)

NPTEL Online Certification
2023

Top 1% Topper (AIR-1) in FDP on Digital System Design

NPTEL
2023

NPTEL Discipline Star Award in Electrical and Electronics Engineering

NPTEL

Community & Membership

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IAENG

2016
Associate Member

IRED

2016
Associate Member

Bio

Dr. Nilesh Patidar is Currently Working as An assistant Professor In the department of Electronics and Communication Engineering At Shri Vaishnav Institute of Technology and Science, Indore. He received the Degree of Bachelor of Engineering in Electronics and Communication Engineering from JIT, Borawan (M.P.), in 2009, and the Master of Engineering in Embedded System and VLSI Design from SVITS, Indore in 2013. He completes Ph.D. under the faculty of Electronics Engineering in 2023.

Personal Details

  • Male
  • Assistant Professor , Shri Vaishnav Vidyapeeth Vishwavidyalaya
  • Shri Vaishnav Vidyapeeth Vishwavidyalaya, Ujjain Road
Ph.D.
Shri Vaishnav Vidyapeeth Vishwavidyalaya 2023
M.E.
Shri Vaishnav Institute of Technology and Science 2013
B.E.
Other Institute 2009
Assistant Professor Jul 2016 – Present
Shri Vaishnav Vidyapeeth Vishwavidyalaya | Department of Electrical and Electronics Engineering
Assistant Professor Aug 2013 – Jun 2016
Shri Vaishnav Institute of Technology and Science

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Co-Authors (3)

Mukesh

Dr Mukesh Patidar

Indore Institute of Science & Technology (II), Pithampur Iim, Rau, Indore - 453331

Namit

Dr Namit Gupta

N/A

Surendra Kumar

Dr Surendra Kumar Shukla

SVKMs NMIMS Mukesh Patel School of Technology Management & Engineering

Scholarly Work

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Scholarly Publications

An ultra-dense and cost-efficient coplanar RAM cell design in quantum-dot cellular automata technology

Open Access
Article
Year: 2024. Volume: 80 , Issue: 5 , Pages: 6989-7027 .
Authors: Patidar M.;Jain A.;Patidar K.;Shukla S.K.;Majeed A.H.;Gupta N.;Patidar N.
DOI 10.1007/s11227-023-05722-1
2

Efficient designs of high-speed combinational circuits and optimal solutions using 45-degree cell orientation in QCA nanotechnology

Open Access
Conference Paper
Year: 2022. Volume: 66 , Pages: 3465-3473 .
Authors: Tiwari A.;Patidar M.;Jain A.;Patidar N.;Gupta N.
DOI 10.1016/j.matpr.2022.06.174
8

An extensible architecture of 32-bit ALU for high-speed computing in QCA technology

Open Access
Article
Year: 2022. Volume: 78 , Issue: 18 , Pages: 19605-19627 .
Authors: Patidar N.;Gupta N.
DOI 10.1007/s11227-022-04608-y
7

The role of nanoelectronic devices in a smart city ecosystem

Open Access
Book Chapter
Year: 2022. Pages: 85-109 .
Authors: Patidar M.;Gupta N.;Jain A.;Patidar N.
DOI 10.1201/9781003252542-6
1

An Efficient Layout of Single-Layer Full Adder Using QCA

Open Access
Conference Paper
Year: 2020. Volume: 1154 , Pages: 165-172 .
Authors: Patidar, Nilesh and Gupta, Namit
DOI 10.1007/978-981-15-4032-5_17
2

Error Detection in 2-bit & 4-bit Multiplier using Parity Predictor Circuit in QCA

Open Access
article
Year: 2015. Volume: 131 , Pages: 27--31 .
Authors: Laad, Ankita and Gupta, Namit and Patidar, Nilesh

Comparison Between the Design of Various Logic Gates Using QCA \& CMOS Technology

Open Access
inproceedings
Year: 2015. Pages: 2--145 .
Authors: Namit Gupta, Rashmi Pandey, Nilesh Patidar, K.K. Chaudhary, Sumant Katiyal

Basic reversible logic gates and it’s QCA implementation

Open Access
article
Year: 2014. Volume: 4 , Pages: 12-16 .
Authors: Papiya Biswas, Namit Gupta, Nilesh Patidar