Ministry of Education
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Dr Mukesh Patidar

vidwan id: 216760
Male

Assistant Professor,
Indore Institute of Science & Technology (II), Pithampur Iim, Rau, Indore - 453331

Orchid Icon 0000-0002-4401-8777 Researcher Icon https://www.researchgate.net/profile/Mukesh-Patida Google Scholar Icon https://scholar.google.com/citations?user=yKNCgtoAAAAJ&hl=en

Expertise

  • Agronomy

Publications

Total Articles 14
Books 0
Proceedings 0

Publications

No publication activity to display at the moment.

Scopus

Citations 39
h-index 3

CrossRef

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Citations 15
h-index 2
Google Scholar

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Professional Recognition

2019

Best Faculty Award

Lakshmi Narain College of Technology, Indore, Indore
2018

Excellent in subject (Data Communication) CS-501

SRIJAN (Certificate of Honour)
2012

Honours-Degree Master of Technology

RGPV Bhopal

Community & Membership

2016

NAAC

Coordinator
2017

NSS

Coordinator

International Association of Engineers (IAENG), Hong Kong

2019
Life Membership No. 249174

Indian Science Congress Association (ISCA) Section: Info. & Com. S & T (include. Comput. S

2018
Life Membership No. L37257

Bio

Analog Communication, Analog and Digital Communication, Electronics, Digital Communication, Data Communication, Digital Electronics, IOT, Nanotechnology, Digital Signal Processing, Speech Signal Processing, Wireless Communication, MIMO-OFDM, Quantum-dot Cellular Automata. • Software: MATLAB/Simulink, Python, Arduino, QCADesign tool, QCADesigner-E tool.

Personal Details

  • Male
  • Research Scholar , Shri Vaishnav Vidyapeeth Vishwavidyalaya
  • Scheme 71, Indore, Madhya Pradesh, India
Ph.D.
Other Institute 2021
M.Tech/M.E.
Other Institute 2012
B.Tech/B.E.
Other Institute 2010
Assistant Professor Jan 2020 – Present
Indore Institute of Science & Technology (II), Pithampur Iim, Rau, Indore - 453331
Research Scholar Jul 2016 – Present
Shri Vaishnav Vidyapeeth Vishwavidyalaya | Department of Electrical and Electronics Engineering
Assistant Professor Mar 2013 – Dec 2019
Lakshmi Narain College of Technology, Indore
Lecturer Mar 2011 – Feb 2013
Shiv Kumar Singh Institute of Technology and Science, Gram Dehri (Bangwasa) Infront of IIM, Pithampur Road, Indore

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Organisation (1)

Mukesh

Dr Mukesh Patidar

Assistant Professor

Co-Authors (3)

Namit

Dr Namit Gupta

N/A

Nilesh

Dr Nilesh Patidar

Shri Vaishnav Vidyapeeth Vishwavidyalaya

Yogendra

Dr Yogendra Kumar

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Scholarly Work

Effective Design and Simulation of Novel Adder and Arithmetic Logic Unit (ALU) based on Nanotechnology using Quantum Dot Cellular Automata

Funding Agency: Department of Electronics Engineering, Shri Vaishnav Vidyapeeth Vishwavidyalaya, Indore (M.P.), India.

Reacher Scholar

-

2016 - Ongoing

Ongoing
Performance Analysis of WiMAX 802.16e Physical layer & MAC Layer Model

Funding Agency: Department of Electronics and Communication Engineering, IPS Academy, Institute of Engineering & Science, Indore

Scholar

-

2011 - 2012

Completed
Wireless target recognition and counter attacking robot with laser gun

Funding Agency: Electronics and Communication Engineering from Indore Institute of Science & Technology, Indore

B.Tech Scholar

-

2009 - 2010

Completed
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Scholarly Publications

An ultra-efficient design and optimized energy dissipation of reversible computing circuits in QCA technology using zone partitioning method

Open Access
Article
International Journal of Information Technology. Year: 2022. Volume: 14 , Issue: 3 , Pages: 1483-1493 .
Authors:
DOI 10.1007/s41870-021-00775-y
2

Efficient designs of high-speed combinational circuits and optimal solutions using 45-degree cell orientation in QCA nanotechnology

Open Access
Conference Paper
Year: 2022. Volume: 66 , Pages: 3465-3473 .
Authors: Tiwari A.;Patidar M.;Jain A.;Patidar N.;Gupta N.
DOI 10.1016/j.matpr.2022.06.174
8

An energy efficient high-speed quantum-dot based full adder design and parity gate for nano application

Open Access
Conference Paper
Year: 2022. Volume: 62 , Pages: 4880-4890 .
Authors: Patidar M.;Shrivastava A.;Miah S.;Kumar Y.;Sivaraman A.K.
DOI 10.1016/j.matpr.2022.03.532
13

Efficient design and implementation of a robust coplanar crossover and multilayer hybrid full adder–subtractor using QCA technology

Open Access
Article
Year: 2021. Volume: 77 , Issue: 8 , Pages: 7893-7915 .
Authors: Mukesh Patidar ., Namit Gupta .,
DOI 10.1007/s11227-020-03592-5
7 18

Efficient design and implementation of a robust coplanar crossover and multilayer hybrid full adder–subtractor using QCA technology

Open Access
journal-article
Year: 2021.
Authors:

An efficient design of edge-triggered synchronous memory element using quantum dot cellular automata with optimized energy dissipation

Open Access
article
Journal of Computational Electronics. Year: 2020.
Authors: Mukesh Patidar and Namit Gupta
DOI 10.1007/s10825-020-01457-x

An efficient design of edge-triggered synchronous memory element using quantum dot cellular automata with optimized energy dissipation

Open Access
journal-article
Journal of Computational Electronics. Year: 2020.
Authors:

Efficient design and simulation of novel exclusive-OR gate based on nanoelectronics using quantum-dot cellular automata

Open Access
Conference Paper
Year: 2019. Volume: 476 , Pages: 599-614 .
Authors: Mukesh Patidar ., Namit Gupta .,
DOI 10.1007/978-981-10-8234-4_48
6