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- Nanoscience and Nanotechnology
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26
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IEEE EDS SRC Region 10
Institute of Physics (IOP)
IEEE, USA
Institution of Engineering and Technology (IET), United Kingdom (UK)
International Association of Engineers, Hong Kong
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Nanoelectronics, Semiconductor Device Modeling and Simulation.
Personal Details
- Male
- Dwarka Sector 3, New Delhi, Delhi, India
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Indian Institute of Technology Roorkee
University of Delhi
Deen Dayal Upadhyaya College
K R Mangalam University, Gurgaon
Delhi Technological University
Birla Institute of Technology and Science
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Scholarly Publications
Unified subthreshold model for channel-engineered sub-100-nm advanced MOSFET structures
Open AccessTwo-dimensional analytical model to characterize novel MOSFET architecture: Insulated shallow extension MOSFET
Open AccessPerformance investigation of 50-nm insulated-shallow-extension gate-stack (ISEGaS) MOSFET for mixed mode applications
Open AccessComparison of three region multiple gate nanoscale structures for reduced short channel effects and high device reliability
Open AccessModeling and simulation of a nanoscale three-region tri-material gate stack (TRIMGAS) MOSFET for improved carrier transport efficiency and reduced hot-electron effects
Open Access
10.1109/TED.2006.876272
44
49
Physics based modeling and simulation of HeteroMaterial Asymmetric Gate Stack Epi (HEMAGASE)-MOSFET
Open AccessThree region Hetero-Material Gate Oxide Stack (TMGOS) Epi-MOSFET: A new device structure for reduced short channel effects
Open AccessTwo-dimensional analytical threshold voltage model for DMG Epi-MOSFET
Open Access
10.1109/TED.2004.841276
11
27