Ministry of Education
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Dr Manoj Saxena

vidwan id: 60671
Male

,

Orchid Icon 0000-0002-9368-4194 Google Scholar Icon 35480023200 Google Scholar Icon IMuLDiEAAAAJ

Expertise

  • Nanoscience and Nanotechnology

Publications

Total Articles 118
Books 0
Proceedings 0

Publications

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Scopus

Citations 2449
h-index 26

CrossRef

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Citations 1999
h-index 24
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Professional Recognition

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IEEE EDS SRC Region 10

2015
Vice Chair

Institute of Physics (IOP)

2011
MInstP - Member

IEEE, USA

2008
Senior Member

Institution of Engineering and Technology (IET), United Kingdom (UK)

2008
MIET - Member

International Association of Engineers, Hong Kong

2008
Member

Bio

Nanoelectronics, Semiconductor Device Modeling and Simulation.

Personal Details

  • Male
  • Dwarka Sector 3, New Delhi, Delhi, India
Ph.D
University of Delhi 2006
Associate Professor Aug 2012 – Dec 2019
University of Delhi

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DEEPAK

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Rashmi

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Assistant Professor

Anjali

Dr Anjali Jadhav

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Mr Abhishek Shukla

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Mrinmoy

Mr Mrinmoy Sadhukhan

Research Scholar

Haranath

Mr Haranath Rakshit

Junior Research Fellow

Organisation (0)

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Co-Authors (6)

Ajay

Prof Ajay Ph.D.

Indian Institute of Technology Roorkee

Mridula C

Prof Mridula C Gupta

University of Delhi

Manoj

Prof Manoj Saxena

Deen Dayal Upadhyaya College

Rajni

Dr Rajni Gautam

K R Mangalam University, Gurgaon

Rishu

Prof Rishu Chaujar

Delhi Technological University

Vinod Kumar

Dr Vinod Kumar Chaubey

Birla Institute of Technology and Science

Scholarly Work

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Scholarly Publications

Laterally amalgamated DUal Material GAte Concave (L-DUMGAC) MOSFET for ULSI

Open Access
Article
Microelectronic Engineering. Year: 2008. Volume: 85 , Issue: 3 , Pages: 566-576 .
Authors: Chaujar R.;Kaur R.;Saxena M.;Gupta M.;Gupta R.S.
DOI 10.1016/j.mee.2007.10.002
24 28

Dual-material double-layer gate stack SON MOSFET: A novel architecture for enhanced analog performance - Part II: Impact of gate-dielectric material engineering

Open Access
Article
IEEE Transactions on Electron Devices. Year: 2008. Volume: 55 , Issue: 1 , Pages: 382-387 .
Authors: Kasturi P.;Saxena M.;Gupta M.;Gupta R.S.
DOI 10.1109/TED.2007.910567
14 19

Dual material double-layer gate stack SON MOSFET: A novel architecture for enhanced analog performance - Part I: Impact of gate metal workfunction engineering

Open Access
Article
IEEE Transactions on Electron Devices. Year: 2008. Volume: 55 , Issue: 1 , Pages: 372-381 .
Authors: Kasturi P.;Saxena M.;Gupta M.;Gupta R.S.
DOI 10.1109/TED.2007.910564
38 44

TCAD performance investigation of a novel MOSFET architecture of Dual Material Gate Insulated Shallow Extension Silicon On Nothing (DMG ISE SON) MOSFET for ULSI era

Open Access
Conference Paper
Year: 2008.
Authors: Kaur R.;Chaujar R.;Saxena M.;Gupta R.S.
DOI 10.1109/APMC.2008.4958643
2 2

Impact of gate stack configuration onto the RF/analog performance of ISE MOSFET

Open Access
Conference Paper
Year: 2008. Pages: 686-688 .
Authors: Kaur R.;Chaujar R.;Saxena M.;Gupta R.S.
DOI 10.1109/AMTA.2008.4762992
1

GEWE-RC MOSFET: High performance RF solution to CMOS technology

Open Access
Conference Paper
Year: 2008.
Authors: Chaujar R.;Kaur R.;Saxena M.;Gupta Mridula ;Gupta R.S.
DOI 10.1109/APMC.2008.4958185
1 1

An iterative approach to characterize various advanced non-uniformly doped channel profiles

Open Access
Conference Paper
Year: 2008. Volume: 3 , Pages: 814-817 .
Authors: Kaur R.;Chaujar R.;Saxena M.;Gupta R.S.

Pre-distortion assessment of workfunction engineered multilayer dielectric design of DMGISE SON MOSFET

Open Access
Conference Paper
Year: 2008. Volume: 3 , Pages: 605-606 .
Authors: Kaur R.;Chaujar R.;Saxena M.;Gupta R.S.
1