Ministry of Education
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Dr Sambhu Nath Pradhan

vidwan id: 59668
Male

Professor,
National Institute of Technology Agartala

Orchid Icon 0000-0002-5461-6535 Google Scholar Icon 24448218300 Researcher Icon ABC-8107-2020 Google Scholar Icon to1uq30AAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 95
Books 0
Proceedings 0

Publications

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Scopus

Citations 417
h-index 11

CrossRef

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Citations 278
h-index 9
Google Scholar

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Professional Recognition

2013

Young Scientist Award

DST

Community & Membership

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Bio

Low Power and Thermal Aware VLSI Design, Synthesis and Testing. Aging Analysis of VLSI Circuits, Hardware Implimentation of Signal Processing Algorithms. Design and Development of Air Quality Monitoring System.

Personal Details

  • Male
  • Professor , National Institute of Technology Agartala
  • National Institute of Technology, Agartala P.O.: NIT Agartala Barjala, Jirania, TRIPURA (W)
Ph.D
Indian Institute of Technology Kharagpur 2010
M.E
Bengal Engineering and Science University 2004
B.Tech
Other Institute 2002
Professor Feb 2024 – Present
National Institute of Technology Agartala
Associate Professor Feb 2019 – Feb 2024
National Institute of Technology Agartala | Department of Electronics and Communication Engineering
Assistant Professor May 2010 – Feb 2019
National Institute of Technology Agartala

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Assistant Professor

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Mr Haranath Rakshit

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Organisations (168+)

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Baby

Dr Baby Bhattacharya

Associate Professor

Arup Ratan

Dr Arup Ratan Bhowmik

Assistant Professor

Atanu

Dr Atanu Chowdhury

Assistant Professor

Ardhendu

Prof Ardhendu Saha

Professor

Ashim

Dr Ashim Saha

Assistant Professor

Ashis

Dr Ashis Acharjee

Assistant Professor

Arvind Kumar

Dr Arvind Kumar Jain

Associate Professor

Barnik

Dr Barnik Saha Roy

Assistant Professor (Grade-I)

Biswanath

Dr Biswanath Bhunia

Assistant Professor

Pritam

Dr Pritam Das

Associate Professor

Co-Authors (11)

Apangshu

Dr Apangshu Das

National Institute of Technology Agartala

Ashim

Dr Ashim Saha

National Institute of Technology Agartala

Bhargab Bikram

Prof Bhargab Bikram Bhattacharya

Indian Statistical Institute, Kolkata

Bikram

Dr Bikram Paul

Indian Institute of Technology Mandi

Bidyut K

Dr Bidyut K Bhattacharyya

N/A

Biswajit

Dr Biswajit Paul

National Institute of Technology Agartala

Kanchan

Dr Kanchan Manna

Birla Institute of Technology and Science

Kaushik

Dr Kaushik Das

National Institute of Technology Jamshedpur

Mitra Barun

Dr Mitra Barun Sarkar

National Institute of Technology Agartala

Santanu

Prof Santanu Chattopadhyay

Indian Institute of Technology Kharagpur

Somnath Roy

Mr Somnath Roy Choudhury

National Institute of Technology Agartala

Scholarly Work

DESIGN AND DEVELOPMENT OF HIGH DATA RATE DEMODULATOR

Funding Agency: ISRO

Principal Investigator

13 Lakhs

2019 - 2021

Completed
SMDP-C2SD

Funding Agency: Ministry of Electronics and Information Technology

Chief Investigator

68 Lakhs

2014 - 2021

Completed
THERMAL AWARE LOGIC SYNTHESIS

Funding Agency: DeitY

Principle Investigator

23.10 Lakhs

2013 - 2016

Completed
LOW POWER VLSI CIRCUIT DESIGN

Funding Agency: AICTE

Principle Investigator

16.00 Lakhs

2012 - 2014

Completed
MODERNISATION OF AUDIO VIDEO LABORATORY

Funding Agency: AICTE

Chief Coordinator

10 Lakhs

2012 - 2013

Completed

SOME TECHNIQUES TO REDUCE LEAKAGE OF LOGIC CIRCUITS

University NIT AGARTALA
Year 2014

POWER AND THERMAL AWARE CIRCUIT SYNTHESIS USING GENETIC ALGORITHM

University NIT Agartala
Year 2017

STUDIES OF SOFT COMPUTING TECHNIQUES FOR FACIAL EXPRESSION RECOGNITION

University NIT Agartala
Year 2017

SOME STUDIES ON POWER AND NOISE REDUCTION OF POWER GATING CIRCUIT

University NIT Agartala
Year 2017

STUDY ON POWER SUPPLY NOISE AND CLOCK JITTER OF INTEGRATED CIRCUIT

University NIT Agartala
Year 2018

LOW POWER TECHNIQUES FOR INTEGRATED CIRCUITS BASED ON DYNAMICALLY CONTROLLED CLOCK AND POWER GATING

University NIT Agartala
Year 2018

POWER AND TEMPERATURE AWARE CIRCUIT TESTING

University NIT Agartala
Year 2020

THERMAL AWARE LOGIC SYNTHESIS

University NIT Agartala
Year 2021

SOME TECHNIQUES TO REDUCE POWER CONSUMPTION OF NETWORK-ON-CHIP ROUTER

University NIT Agartala
Year 2021

TIME EFFICIENT THERMAL AWARE DESIGN AUTOMATION FOR MACROCELL FLOORPLAN AND GATE ARRAY PLACEMENT

University NIT Agartala
Year 2022

SOME APPROACHES TO REDUCE THE BIAS TEMPERATURE INSTABILITY RELATED AGING DEGRADATION OF LOGIC CIRCUITS

University NIT Agartala
Year 2023

Efficient Hardware Realizations of Empirical Mode Decomposition and Some Other Related Algorithms for Signal Processing in Real-Time

University NIT Agartala
Year 2023

Growth of Zero-dimensional (0D) Carbon Nanomaterial Sensitized TiO2 Nanorod Photoanodes for Photoelectrochemical Solar Energy Conversion

University National Institute of Technology, Agartala
Year 2022

PCB DESIGN OF PORTABLE AIR QUALITY MONITORING SYSTEM WITH ENHANCED BATTERY LIFE

S. N. Pradhan
K. D. Purkayastha
D. Nath
V. K. Sing and
B. Debbarma
Engineering and Technology Application No. : 202031038999 Filed : 09-09-2020
Published : 11-03-2022 Published

Scholarly Publications

A genetic algorithm approach for hybrid ALU design

Open Access
Conference Paper
Year: 2015. Pages: 1298-1303 .
Authors: Purkayastha A.A.;Choudhury S.R.;Pradhan S.N.
DOI 10.1109/CCAA.2015.7148576
1 1

Implementation of circuit in different adiabatic logic

Open Access
Conference Paper
Year: 2015. Pages: 353-359 .
Authors: Chaudhuri A.;Saha M.;Bhowmik M.;Pradhan S.N.;Das S.
DOI 10.1109/ECS.2015.7124923
18 20

CG-in-PG architecture implementation for power reduction in FSMs

Open Access
Article
International Journal of Electronics Letters. Year: 2014. Volume: 2 , Issue: 3 , Pages: 180-185 .
Authors: Choudhury P.;Nag A.;Nath D.;Pradhan S.
DOI 10.1080/21681724.2014.894136
2 3

A new design of adder circuit for low power and high speed in sub-threshold region

Open Access
Article
International Journal of Electronics Letters. Year: 2014. Volume: 2 , Issue: 1 , Pages: 17-29 .
Authors: Chakraborty A.;Pradhan S.
DOI 10.1080/21681724.2013.860575
2 3

A new design of adder circuit for low power and high speed in sub-threshold region

Open Access
Article
International Journal of Electronics Letters. Year: 2014. Volume: 2 , Issue: 1 , Pages: 17-29 .
Authors: Chakraborty A.;Pradhan S.
DOI 10.1080/21681724.2013.860575
2 3

Power gating architecture implementation inside clock period to reduce power

Open Access
Article
International Journal of Computer Aided Engineering and Technology. Year: 2014. Volume: 6 , Issue: 3 , Pages: 310-323 .
Authors: Nath D.;Choudhury P.;Nag A.;Pradhan S.N.
DOI 10.1504/IJCAET.2014.063118
1 3

Power Aware Synthesis of Power Gated FSM

Open Access
article
Year: 2014. Volume: 2 , Pages: 120-127 .
Authors: 14. P. Choudhury and S. N. Pradhan