Expertise
- Electrical and Electronic Engineering
Publications
Publications
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Scopus
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18
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Citations
840
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17
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Professional Recognition
Internat. Edu of the Year 2007
IBC (UK)INSA Young Scientist Award
INSA,New DelhiS K Mitra Memorial
IETE,New DelhiS K Mitra Memorial Award
IETE,New DelhiKhosla Research Award
University of RoorkeeKhosla Award Gold Medal
University of RoorkeeKhosla Research Award
University of RoorkeeCommunity & Membership
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Bio
VLSI Technology, III-V Semiconductor Materials and Devices for High frequency and Optoelectronic Appli, VLSI Technology.
Personal Details
- Male
- Indian Institute of Technology Roorkee
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Co-Authors (11)
Indian Institute of Technology Roorkee
Jaypee Institute of Information Technology, Noida
National Institute of Technology Kurukshetra
National Institute of Technical Teachers Training & Research, Chandigarh
ABV Indian Institute of Information Technology & Management, Gwalior
National Institute of Technology Patna
Dr B R Ambedkar National Institute of Technology, Jalandhar
Indian Institute of Technology Roorkee
National Institute of Technology Warangal
Indian Institute of Technology Indore
Indian Institute of Technology Roorkee
Scholarly Work
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Scholarly Publications
Lateral silicon nanowire based standard cell design for higher performance
Open AccessA unified Verilog-A compact model for lateral Si nanowire (NW) FET incorporating parasitics for circuit simulation
Open AccessOxide thickness and S/D junction depth based variation aware OTA design using underlap FinFET
Open AccessCompact model for vertical silicon nanowire based device simulation and circuit design
Open AccessEnhancing low temperature analog performance of underlap FinFET at scaled gate lengths
Open Access
10.1109/TED.2014.2353139
18
30
Effect of load capacitance and input transition time on FinFET inverter capacitances
Open Access
10.1109/TED.2013.2291013
27
30
Analytical modeling of a double gate mosfet considering source/drain lateral gaussian doping profile
Open Access
10.1109/TED.2013.2282632
32
52
Design and analysis of analog performance of dual-k spacer underlap N/P-FinFET at 12 nm gate length
Open Access
10.1109/TED.2013.2250975
39
63