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Dr Aruna Mastani S

vidwan id: 321497
Female

Associate Professor, Department of Electronics and Communication Engineering
Jawaharlal Nehru Technological University, Anantapur

Expertise

  • Telecommunications

Publications

Total Articles 8
Books 0
Proceedings 0

Publications

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Bio

Electronics and Communication Engineering

Personal Details

  • Female
  • Associate Professor , Jawaharlal Nehru Technological University, Anantapur
  • Department of Electronics and Communication Engineering, Jawaharlal Nehru Technological University, Anantapur
Ph.D
Other Institute 2010
Associate Professor Feb 2011 – Present
Jawaharlal Nehru Technological University, Anantapur | Department of Electronics and Communication Engineering

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Co-Authors (1)

Sathiaseelan

Dr Sathiaseelan P

PPG Institute of Technology

Scholarly Work

Optimization of EEG Processor Architecture for portability, cost effectiveness and suitable for making self diagnostics for seizure Prediction

Funding Agency: RUSA 2.0

Principle Investigator

1,100,000

2024 - Ongoing

Ongoing

High Performance Architectures for Arithmetic Circuits through Look-Up-Table Approach

University JNTUA , University , Anantapuramu -515001, AP
Year 2020

Design and Analysis of different Sensor Models for Bio-Medical Applications

University JNTUA , University , Anantapuramu -515001, AP
Year 2019

Hybrid approach on Content based Image Retrieval

University JNTUA , University , Anantapuramu -515001, AP
Year 2023

Computation Efficient Video Frame Interpolation

University JNTUA , University , Anantapuramu -515001, AP
Year 2024

A Novel Architecture for MAC

Shaik Aruna Mastani
Sadasivam Kannappan
Engineering and Technology Patent No. : 518011 Filed : 27-06-2019
Published : 01-01-2021 Granted

Scholarly Publications

HOME AUTOMATION CHIP ON FPGA

Open Access
article
Authors: C Chandra Murali, Dr S Aruna Mastani, K Srinivasa Rao

ECRAAL: a high‑performance multiplier design by efcient charge recovery asynchronous adiabatic logic

Open Access
article
Authors: S. Nagaraj G. M. Sreerama Reddy S. Aruna Mastani

Power and Area Optimized Deep Learning Framework for Accurate Automatic Epileptic Seizure Detection

Open Access
article
Authors: M Zaheer Ahamed, S Aruna Mastani

DESIGN AND IMPLEMENTATION OF TYPE III UNUM POSIT ADDER/SUBTRACTOR

Open Access
article
Authors: M. Prasanthi Dr. S. Aruna Mastani

Distributed Memory based Architecture for Multiplier

Open Access
article

Coherent Circuits for Parallel Bit-Reversal

Open Access
article
Authors: S. Aruna Mastani, G. Deepa

Low Complex Block Level Correlation and Registration for Video Frame Interpolation

Open Access
article
Authors: Brahmadesam T Madav, S.A.K. Jilani ,S. Aruna Mastani

Indian Journal of Science and Technology

Open Access
other
Authors: P. Sathiaseelan ,S. Arulselvan