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Mr Jahangir Mohd Ziauddin

vidwan id: 271654
Male

Assistant Professor, Electronics and Communication Engineering - ECE
Chaitanya Bharathi Institute of Technology, Hyderabad

Expertise

  • Telecommunications

Publications

Total Articles 14
Books 0
Proceedings 0

Publications

No publication activity to display at the moment.

Scopus

Citations 15
h-index 1

CrossRef

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Citations 28
h-index 2
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Professional Recognition

2015

Best Paper Award

IEEE- INDICON 2015, New Delhi

Community & Membership

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IEEE

2022
Professional

Bio

Analog IC Design, Mixed IC Design, Embedded System Design

Personal Details

  • Male
  • Assistant Professor , Chaitanya Bharathi Institute of Technology, Hyderabad
  • Chaitanya Bharathi Institute of Technology, Osman Sagar Road, Kokapet, Gandipet
ME
Other Institute 2013
B.E.
Other Institute 2009
Assistant Professor Sep 2014 – Present
Chaitanya Bharathi Institute of Technology, Hyderabad | Electronics and Communication Engineering - ECE

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Co-Authors (3)

Naga Rama Lingeswara Chandra S

Dr Naga Rama Lingeswara Chandra S Pentapati

Gandhi Institute of Technology and Management

Nalam

Dr Nalam Venkata Koteswara Rao

Chaitanya Bharathi Institute of Technology, Hyderabad

Scholarly Work

The Design, Fabrication and Development of High Resolution All Digital Phase Locked Loop IP

Funding Agency: Ministry of Electronics and Information Technology

Chief Investigator

19,160,000

2023 - Ongoing

Ongoing
Study of Ultrasound based Flow Rate measurement of fluids

Funding Agency: Skylarks Smart Meters

Co Principal Investigator

250,000

2023 - 2023

Completed
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Scholarly Publications

A 1.2GHz Frequency Range, 153.4 dBc/Hz FoM, Low Phase Noise, Current Starved Multi-Path Ring VCO

Open Access
Article

A DIGITALLY CONTROLLED OSCILLATOR FOR ADPLL USING COMBINATIONAL FREQUENCY MULTIPLIER AND NOVEL VARIABLE DELAY INVERTER

Open Access
Article

Design of a novel charge pump based current starved ring oscillator with reduced phase noise

Open Access
conference-paper
Authors: Jahangir, Mohd Ziauddin;Paidimarry, Chandra Sekhar

Design of novel hybrid - digitally controlled oscillator for ADPLL

Open Access
journal-article

Study and Performance Comparison of Coupled Ring Oscillator

Open Access
book-chapter

Design and Implementation of FPGA based DDS-ADPLL for Resonant Frequency Tracking in Sensors

Open Access
Conference Paper
Authors: Jahangir M.Z.;Chandra Sekhar P.;Sikander M.;Krishna J.V.

Design of an All Digital Phase-Locked Loop Using Cordic Algorithm

Open Access
Conference Paper
Authors: Jahangir M.Z.;Paidimarry C.S.;Sikander M.;Shravanthi M.V.

The Design of DDS ADPLL using ARM Micro Controller

Open Access
journal-article