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Dr Sanjay Vidhyadharan

vidwan id: 230819
Male

Assistant Professor, Department of WILP
Birla Institute of Technology and Science

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 34
Books 0
Proceedings 0

Publications

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Scopus

Citations 154
h-index 8

CrossRef

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Citations 193
h-index 8
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Professional Recognition

2006

Chief of Air Staff Commendation

Indian Airforce

Community & Membership

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Bio

VLSI Design

Personal Details

  • Male
  • Assistant Professor , Birla Institute of Technology and Science
  • BITS Pilanai
PhD
Other Institute 2020
M.Tech
Other Institute 2010
B.E
Other Institute 1994
Assistant Professor Aug 2021 – Present
Birla Institute of Technology and Science | Department of WILP
Engineer Nov 1994 – Aug 2016
Indian Air Force

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Organisations (1053+)

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Co-Authors (3)

Jitendra

Dr Jitendra Kanungo

Jaypee University of Engeenering & Technology, Guna

Ramakant

Dr Ramakant

Mahindra University, Hyderabad

Surya Shankar

Dr Surya Shankar Dan

Birla Institute of Technology and Science

Scholarly Work

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Scholarly Publications

Suppression of Ambipolar Behavior and Simultaneous Improvement in RF Performance of Gate-Overlap Tunnel Field Effect Transistor (GOTFET) Devices

Open Access
Article
Authors: Yadav R.;Dan S.S.;Vidhyadharan S.;Hariprasad S.

TiO<inf>2−x</inf>–TiO<inf>2</inf> Memristor Applications for Programmable Analog VLSI Circuits at 45 nm CMOS Technology Node

Open Access
Article

A novel ultra-low-power gate overlap tunnel FET (GOTFET) dynamic adder

Open Access
Article

An innovative ultra-low voltage GOTFET based regenerative-latch Schmitt trigger

Open Access
Article
Authors: Vidhyadharan S.;Dan S.S.;Yadav R.;Hariprasad S.

Novel gate-overlap tunnel FET based innovative ultra-low-power ternary flash ADC

Open Access
Article
Authors: Vidhyadharan S.;Dan S.S.;Abhay S.V.;Yadav R.;Hariprasad S.

Innovative multi-threshold gate-overlap tunnel FET (GOTFET) devices for superior ultra-low power digital, ternary and analog circuits at 45-nm technology node

Open Access
Article

An efficient design approach for implementation of 2 bit ternary flash ADC using optimized complementary TFET devices

Open Access
Conference Paper
Authors: Vidhyadharan S.;Ramakant ;Sv A.;Shyam A.K.;Hirpara M.P.;Dan S.S.

Part ii: Benchmarking the performance of optimized tfet-based circuits with the standard 45 nm cmos technology using device & circuit co-simulation methodology

Open Access
CONFERENCE
Authors: Sanjay Vidhyadharan ., Gangishetty Akhilesh ., Vaibhav Gupta ., Anand Ravi ., Surya Shankar Dan .,