Ministry of Education
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Jujavarapu Sravana

vidwan id: 217092
Female

Assistant Professor,
Malla Reddy Engineering College for women

Orchid Icon 0000-0002-9415-7943 Google Scholar Icon 57191917006 Researcher Icon AAT-5268-2021 Google Scholar Icon iq7dic8AAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 14
Books 0
Proceedings 0

Publications

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Scopus

Citations 49
h-index 3

CrossRef

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Citations 14
h-index 2
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Professional Recognition

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Community & Membership

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IETE

2015
Life time

Bio

Electronics and Communication Engineering

Personal Details

  • Female
  • Assistant Professor , Malla Reddy Engineering College for women
  • Geethanjali College of Engineering and Technology, Cheeryal Village, Keesara Mandal
Ph.D(Pursuing)
Other Institute 2022
MTECH
Other Institute 2011
Assistant Professor Sep 2024 – Present
Malla Reddy Engineering College for women
Assistant Professor Mar 2022 – Sep 2024
Geetanjali College of Engineering & Technology | Electronics and Communication Engineering
Assistant Professor Jun 2013 – Mar 2022
Institute of Aeronautical Engineering | Electronics and Communication Engineering

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Co-Authors (8)

Ajitha

Ajitha G

Institute of Aeronautical Engineering

Anjaneyulu

Mr Anjaneyulu P

MLR Institute of Technology

Chandrashaker

Dr Chandrashaker Pittala

N/A

S. China

Dr S. China Venkateswarlu

N/A

S

Mr S Lakshmanachari

Institute of Aeronautical Engineering

Nehru

Dr Nehru K

Madanapalle Institute of Technology & Science, Madanapalle

Khadir

Mr Khadir Mohammad

Institute of Aeronautical Engineering

Vijay

Dr Vijay V

N/A

Scholarly Work

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Scholarly Publications

Universal Shift Register Designed at Low Supply Voltages in 20 nm FinFET Using Multiplexer

Open Access
Conference Paper
Year: 2022. Volume: 213 , Pages: 203-212 .
Authors: Vallabhuni R.R.;Sravana J.;Pittala C.S.;Divya M.;Rani B.M.S.;Vijay V.
DOI 10.1007/978-981-16-2422-3_17
8

Novel Architecture for Logic Test Using Single Cycle Access Structure

Open Access
Article
Journal of VLSI circuits and systems. Year: 2021. Volume: 3 , Issue: 1 , Pages: 1-6 .
Authors: Pittala C.S.;Sravana J.;Ajitha G.;Lakshamanachari S.;Vijay V.;Venkateswarlu S.C.
DOI 10.31838/jvcs/03.01.01
13

Universal Shift Register Designed at Low Supply Voltages in 20nm FinFET Using Multiplexer

Open Access
book chapter
Year: 2021.
Authors: Rajeev Ratna Vallabhuni ., Jujavarapu Sravana ., Chandra Shaker Pittala ., Mikkili Divya ., B. M. S. Rani ., Vallabhuni Vijay .,

Novel Methodology to Validate DUTs Using Single Access Structure

Open Access
Conference Paper
Year: 2021.
Authors: Pittala C.S.;Sravana J.;Ajitha G.;Saritha P.;Khadir M.;Vijay V.;Venkateswarlu S.C.;Vallabhuni R.R.
DOI 10.1109/IEMENTech53263.2021.9614863
20

An advanced computing architecture binary to thermometer decoder using 18nm technology to

Open Access
conference paper
Year: 2020.
Authors: J sravana

An advanced computing architecture for binary to thermometer decoder using 18nm FinFET

Open Access
Conference Paper
Year: 2020. Pages: 510-515 .
Authors: Vallabhuni R.R.;Sravana J.;Saikumar M.;Sriharsha M.S.;Rani D.R.
DOI 10.1109/ICSSIT48917.2020.9214105
4 12

A 9bit parity generator exor using x04 and x07 technology

Open Access
article
Year: 2017.
Authors: J sravana

9-bit parity generator using XO4 and XO7 technology

Open Access
Article
Journal of Advanced Research in Dynamical and Control Systems. Year: 2017. Volume: 9 , Issue: 2 , Pages: 251-262 .
Authors: Sravana J.;Ajitha G.;Srihari C.;Ranjitha S.;Anjaneyulu P.
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