Ministry of Education
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Dr Kumaravel S

vidwan id: 191565
Male

Associate Professor, School of Electronics Engineering
Vellore Institute of Technology, Vellore

Orchid Icon 0000-0003-2171-9420 Google Scholar Icon 57201697128 Researcher Icon K-8167-2017 Google Scholar Icon VqkMl4gAAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 39
Books 0
Proceedings 0

Publications

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Scopus

Citations 112
h-index 6

CrossRef

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Citations 65
h-index 5
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Professional Recognition

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Bio

Analog IC Design, Mixed Signal IC Design, RFIC Design, and Low Power VLSI

Personal Details

  • Male
  • Associate Professor , Vellore Institute of Technology, Vellore
  • Vellore Institute of Technology
PhD
Other Institute 2015
Associate Professor Jan 2015 – Present
Vellore Institute of Technology, Vellore | School of Electronics Engineering

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Co-Authors (4)

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Prof B Venkataramani

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Scholarly Work

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Scholarly Publications

Improved transconductance multipath recycling folded cascode amplifier

Open Access
Article
Microsystem Technologies. Year: 2022.
Authors: Venishetty S.R.;Sundaram K.
DOI 10.1007/s00542-022-05289-6

Design of Imprecise Multipliers by Using Approximate Technique for Error Resilient Applications

Open Access
Article
Journal of Circuits, Systems and Computers. Year: 2021. Volume: 30 , Issue: 7 .
Authors: Priyadharshni M.;Kumaravel S.
DOI 10.1142/S0218126621501140
1

A Low-Noise Area-Efficient Current Feedback Instrumentation Amplifier

Open Access
Article
Circuits, Systems, and Signal Processing. Year: 2021. Volume: 40 , Issue: 3 , Pages: 1496-1510 .
Authors: Sanjay R.;Venkataramani B.;Kumaravel S.;Rajan V.S.;Kishore K.H.
DOI 10.1007/s00034-020-01527-2
1 1

A low power and soft error resilience guard-gated Quartro-based flip-flop in 45 nm CMOS technology

Open Access
Article
Year: 2021. Volume: 15 , Issue: 6 , Pages: 571-580 .
Authors: Sabavat Satheesh Kumar ., Kumaravel Sundaram ., Sanjeevikumar Padmanaban ., Jens Bo Holm‐Nielsen ., Frede Blaabjerg .,
DOI 10.1049/cds2.12052

A Source Degenerated Cascode LNA with High Gain and Low Noise Figure Using Layout Optimized High Q Inductors

Open Access
Conference Paper
Year: 2021. Volume: 1392 , Pages: 255-268 .
Authors: Tayenjam S.;Vanukuru V.;Kumaravel S.
DOI 10.1007/978-981-16-5048-2_20

Low Power Hardware Design for N-Bit Fixed Point Division Algorithm Using GDI Logic

Open Access
Conference Paper
Year: 2021. Volume: 1392 , Pages: 89-100 .
Authors: Venishetty S.R.;Chidra A.K.;Sai Likhitha B.;Deepak M.;Sundaram K.
DOI 10.1007/978-981-16-5048-2_8

An error efficient and low complexity approximate multi-bit adder for image processing applications

Open Access
Article
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS. Year: 2021. Volume: 49 , Issue: 8 , Pages: 2373-2381 .
Authors: Priyadharshni M.;Raj Gupta A.;Nithish Kumar V.;Kumaravel S.
DOI 10.1002/cta.3074

Power-efficient implementation of pseudo-random number generator using quantum dot cellular automata-based D Flip Flop

Open Access
Article
Year: 2020. Volume: 85 .
Authors: Senthilnathan S.;Kumaravel S.
DOI 10.1016/j.compeleceng.2020.106658
1