Ministry of Education
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Dr Avik Chattopadhya

vidwan id: 121879
Male

Assistant Professor, Institute of Radio Physics and Electronics
Calcutta University

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Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 55
Books 0
Proceedings 0

Publications

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Scopus

Citations 878
h-index 14

CrossRef

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Citations 374
h-index 7
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Bio

Nanoelectronics, VLSI Design

Personal Details

  • Male
  • Assistant Professor , Calcutta University
  • University of Calcutta
Ph.D
Other Institute 2013
Assistant Professor Mar 2016 – Present
Calcutta University | Institute of Radio Physics and Electronics

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Co-Authors (6)

Abhijit

Dr Abhijit Mallik

Calcutta University

Anupam

Dr Anupam Karmakar

Calcutta University

Abhishek

Dr Abhishek Basu

RCC Institute of Information Technology

Suman

Dr Suman Das

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Sk Masum

Dr Sk Masum Nawaz

Birla Institute of Technology and Science

Suman

Mr Suman Das

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Scholarly Work

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Scholarly Publications

Dependence of Analog Performance and Linearity with Channel Doping Concentration for an InGaAs MOSFET

Open Access
Conference Paper
Year: 2024. Volume: 306 , Pages: 43-48 .
Authors: Datta E.;Chattopadhyay A.;Mallik A.
DOI 10.1007/978-981-97-1571-8_5

Effect of Channel Epilayer Thickness on Low Power Analog Operation of Asymmetric U-Shaped pTFET

Open Access
Conference Paper
Year: 2024. Volume: 306 , Pages: 49-55 .
Authors: Das S.;Chattopadhyay A.;Tewari S.
DOI 10.1007/978-981-97-1571-8_6

A Study on Statistical Analysis for Performance Evaluation of Digital Watermarking

Open Access
Conference Paper
Year: 2023.
Authors: Saha A.;Roy S.S.;Basu A.;Chattopadhyay A.
DOI 10.1109/ICAECT57570.2023.10117928
1

Study on linearity and harmonic distortion for a unique U-TFET in low-power analog/RF applications: The role of channel epilayer thickness

Open Access
Article
Year: 2023. Volume: 168 .
Authors: Das S.;Tewari S.;Chattopadhyay A.
DOI 10.1016/j.aeue.2023.154714
1 2

Prospects of Digital Watermarking in Providing SecurityReliability, and Privacy to Medical Images

Open Access
Article
Year: 2023. Volume: 17 , Issue: 2 , Pages: 168-182 .
Authors: Roy S.S.;Basu A.;Chattopadhyay A.
DOI 10.37936/ecti-cit.2023172.249484
2

Asymmetric-Elevated-Source-Drain TFET: A Fairly Scalable and Reliable Device Architecture for Sub-400-mV Low-Stand-by-Power Digital Applications

Open Access
Article
Year: 2022. Volume: 39 , Issue: 2 , Pages: 316-327 .
Authors: Das S.;Chattopadhyay A.;Tewari S.
DOI 10.1080/02564602.2020.1852120
5 7

Architecture- and Gate-Oxide-Level Optimization of a Si-Based Asymmetric U-TFET for Low Power Operation: a Real-Time Gate/Drain Electrostatic Based Leakage Perspective

Open Access
Article
Year: 2022. Volume: 14 , Issue: 16 , Pages: 10719-10727 .
Authors: Das S.;Chattopadhyay A.;Tewari S.
DOI 10.1007/s12633-022-01810-8
1 2

Asymmetric U-Shaped-Gated TFET for Low-Power Ana-Digi Applications at Sub-7-nm Technology Node: A Simulation-Based Optimization Study

Open Access
Article
IEEE Transactions on Electron Devices. Year: 2022. Volume: 69 , Issue: 11 , Pages: 6430-6437 .
Authors: Das S.;Chattopadhyay A.;Tewari S.
DOI 10.1109/TED.2022.3207136
5 8