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Dr Suman Das

vidwan id: 272524
Male

Assistant Professor, Department of Computer Science and Engineering
Brainware University

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 15
Books 0
Proceedings 0

Publications

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Scopus

Citations 25
h-index 3

CrossRef

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Citations 29
h-index 3
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Professional Recognition

2015

University Gold Medal

West Bengal University of Technology

Community & Membership

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Bio

VLSI, Semiconductor Devices

Personal Details

  • Male
  • Assistant Professor , Brainware University
  • 398, Ramkrishnapur Rd, near Jagadighata Market, Barasat, Kolkata, West Bengal 700125
Ph.D.(Tech.)
Other Institute 2024
M.Tech.
West Bengal University of Technology 2014
B.Tech.
West Bengal University of Technology 2011
Assistant Professor Apr 2025 – Present
Brainware University | Department of Computer Science and Engineering
Assistant Professor (Grade-I) Sep 2019 – Mar 2025
Sikkim Manipal University, Gangtok | Department of Electronics and Communication Engineering (SMIT)
Assistant Professor (Grade-II) Sep 2014 – Aug 2019
Sikkim Manipal University, Gangtok | Department of Electronics and Communication Engineering (SMIT)

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Co-Authors (3)

Avik

Dr Avik Chattopadhya

Calcutta University

Bikash

Dr Bikash Sharma

Sikkim Manipal University, Gangtok

Suman

Mr Suman Das

Sikkim Manipal University, Gangtok

Scholarly Work

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Scholarly Publications

Impact of Technology Node on Low Power Analog Performance of AU-TFET: A Quantum-Inspired Study

Open Access
Conference Paper

Ab Initio Investigation of Optical and Electronic Properties of Pt‐Doped Pentagonal PdSe2 Monolayer

Open Access
article
Authors: Bibek Chettri, Prasanna Karki, Pronita Chettri, Sanat Kr Das, Suman Das, Bikash Sharma

Effect of Channel Epilayer Thickness on Low Power Analog Operation of Asymmetric U-Shaped pTFET

Open Access
Conference Paper

Study on linearity and harmonic distortion for a unique U-TFET in low-power analog/RF applications: The role of channel epilayer thickness

Open Access
Article
Authors: Das S.;Tewari S.;Chattopadhyay A.

Asymmetric-Elevated-Source-Drain TFET: A Fairly Scalable and Reliable Device Architecture for Sub-400-mV Low-Stand-by-Power Digital Applications

Open Access
Article

Thermal Effect of Analog/RF Performance, Linearity and Harmonic Distortion for L-Gate TFET

Open Access
Article
Authors: Das, Suman and Sharma, Bikash

Architecture- and Gate-Oxide-Level Optimization of a Si-Based Asymmetric U-TFET for Low Power Operation: a Real-Time Gate/Drain Electrostatic Based Leakage Perspective

Open Access
Article

Asymmetric U-Shaped-Gated TFET for Low-Power Ana-Digi Applications at Sub-7-nm Technology Node: A Simulation-Based Optimization Study

Open Access
Article