Prof G.S. Visweswaran

vidwan id: 10535

Male

6602989195

Publications

Total Articles 47

Books 0

Proceedings 0

Publications

Scopus

Citations 286

h-index 9

CrossRef

Citations 202

h-index 7

Google Scholar

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Professional Recognition

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Bio

CAD of VLSI,Design of digital,Analog and mixed signal VLSI circuits

Personal Details

Male
Department of Electrical Engineering, Indian Institute of Technology Delhi, Hauz Khas

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Adjunct Lecturer Nov -0001 – —

Indian Institute of Technology Delhi | Department of Electrical Engineering

Related Profiles

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Co-Authors (11)

Prof Anshul Kumar

Indian Institute of Technology Delhi

Dr Anuj Grover

Indraprastha Institute of Information Technology Delhi (IIIT Delhi)

Prof B. Bhaumik

Indian Institute of Technology Delhi

Dr Maneesha Gupta

Netaji Subhas University of Technology

Prof M. Balakrishnan

N/A

Dr Mohammad S. Hashmi

N/A

Prof Preeti Ranjan Panda

Indian Institute of Technology Delhi

Dr Pragya Varshney

N/A

Prof Shiv Dutt Joshi

Indian Institute of Technology Delhi

Prof Shouribrata Chatterjee

Indian Institute of Technology Delhi

Dr G S Visweswaran

N/A

Scholarly Work

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Scholarly Publications

Impact of crosstalk and process variation on capture power reduction for at-speed test

Open Access

Conference Paper

Year: 2016. Volume: 2016-May .

Authors: Piplani S.;Visweswaran G.S.;Kumar A.

10.1109/VTS.2016.7477291

A 0.5V VMIN 6T SRAM in 28nm UTBB FDSOI Technology Using Compensated WLUD Scheme with Zero Performance Loss

Open Access

Conference Paper

Year: 2016. Volume: 2016-March , Pages: 191-195 .

Authors: Kumar, Ashish;Visweswaran, G. S.;Kumar, Vinay;Saha, Kaushik

10.1109/VLSID.2016.62

A 6T-SRAM in 28nm FDSOI technology with Vmin of 0.52V using assisted read and write operation

Open Access

Conference Paper

Year: 2015.

Authors: Kumar, Ashish;Kumar, Vinay;Janardan, Dhori Kedar;Visweswaran, G. S.;Saha, Kaushik

10.1109/ICICDT.2015.7165877

Low Standby Power Capacitively Coupled Sense Amplifier for wide voltage range operation of dual rail SRAMs

Open Access

Conference Paper

Year: 2015.

Authors: Grover A.;Kumar P.;Daud M.;Visweswaran G.S.;Parthasarathy C.;Noel J.P.;Turgis D.;Giraud B.;Moritz G.

10.1109/ICICDT.2015.7165876

Low voltage error resilient SRAM using run-time error detection and correction

Open Access

Conference Paper

Year: 2015. Volume: 2015-October , Pages: 335-338 .

Authors: Kumar, Ashish;Visweswaran, G. S.;Saha, Kaushik

10.1109/ESSCIRC.2015.7313895

Implementation of first and third order fractional order differentiators and integrators using switched capacitors

Open Access

Conference Paper

Year: 2011.

Authors: Varshney P.;Gupta M.;Visweswaran G.S.

10.1109/IICPE.2011.5728088

New approach to realize fractional power in z-domain at low frequency

Open Access

Article

Year: 2011. Volume: 58 , Issue: 3 , Pages: 179-183 .

Authors: Visweswaran G.S.;Varshney P.;Gupta M.

10.1109/TCSII.2011.2110350

Switched capacitor realizations of fractional-order differentiators and integrators based on an operator with improved performance

Open Access

Article

Radioengineering. Year: 2011. Volume: 20 , Issue: 1 , Pages: 340-348 .

Authors: Varshney P.;Gupta M.;Visweswaran G.S.

Showing 9 to 16 of 47 results