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Dr Ashwani Rana

vidwan id: 101432
Male

Associate Professor, Department of Electronics and Communication Engineering
National Institute of Technology, Hamirpur

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 73
Books 0
Proceedings 0

Publications

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Scopus

Citations 462
h-index 13

CrossRef

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Citations 269
h-index 10
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Bio

Modeling of Semiconductor Devices, Low Power High Performance VLSI Circuit Design and Emerging Integrated Circuit Technologies

Personal Details

  • Male
  • Associate Professor , National Institute of Technology, Hamirpur
  • Department of Electronics and Communication Engineering, National Institute of Technology, Hamirpur
Ph.D
National Institute of Technology, Hamirpur 2011
Associate Professor Aug 2000 – Present
National Institute of Technology, Hamirpur | Department of Electronics and Communication Engineering

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Co-Authors (11)

Amita

Dr Amita Nandal

Manipal University, Jaipur

Arvind

Dr Arvind Dhaka

Manipal University, Jaipur

Gaurav

Dr Gaurav Saini

National Institute of Technology Kurukshetra

GAURAV

Dr GAURAV SAINI

National Institute of Technology Kurukshetra

Pankaj Kumar

Dr Pankaj Kumar Pal

National Institute of Technology, Uttarakhand

Rajneesh

Dr Rajneesh Sharma

Thapar Institute of Engineering & Technology

Ashish

Dr Ashish Raman

Dr B R Ambedkar National Institute of Technology, Jalandhar

Rajeevan

Prof Rajeevan Chandel

National Institute of Technology, Hamirpur

Shalu

Dr Shalu K

University Institute of Information and Technology, H.P.U, Shimla

Sunil

Dr Sunil Jadav

J.C. Bose University of Science and Technology

Scholarly Work

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Scholarly Publications

Linear transformation based efficient canonical signed digit multiplier using high speed and low power reversible logic

Open Access
Conference Paper
Authors: Nandal A.;Vigneswaran T.;Rana A.

Gate current modeling and optimal design of nanoscale non-overlapped gate to source/drain MOSFET

Open Access
Article

Analysis and application of hybrid MOSFET structure for low gate leakage

Open Access
Article

Adiabatic technique for energy efficient logic circuits design

Open Access
Conference Paper
Authors: Yadav R.K.;Rana A.K.;Chauhan S.;Ranka D.;Yadav K.

Gate leakage behavior of source/drain-to-gate non-overlapped MOSFET structure

Open Access
Article

Gate leakage aware optimal design of modified hybrid nanoscale MOSFET and its application to logic circuits

Open Access
Article
Authors: Rana A.K.;Chand N.;Kapoor V.K.
3

Analysis of non-conventional hybrid MOSFET structure for gate leakage current

Open Access
Article
Authors: Rana A.;Chand N.;Kapoor V.

A novel Source/Drain-to-gate non-overlap MOSFET to reduce gate leakage current in nano regime

Open Access
Article
Authors: Rana A.;Chand N.;Kapoor V.