Ministry of Education
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Dr Kailash chandra Ray

vidwan id: 99941
Male

Associate Professor, Department of Electrical Engineering
Indian Institute of Technology Patna

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Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 77
Books 0
Proceedings 0

Publications

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Scopus

Citations 1284
h-index 18

CrossRef

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Citations 632
h-index 14
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Bio

VLSI architectural design, VLSI Signal Processing, Digital VLSI Design, Hardware design methodologies, FPGA based System Design, CORDIC

Personal Details

  • Male
  • Associate Professor , Indian Institute of Technology Patna
  • Indian Institute of Technology Patna, Bihta
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Associate Professor Jun 2010 – Present
Indian Institute of Technology Patna | Department of Electrical Engineering

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Co-Authors (9)

Amit Kumar

Dr Amit Kumar Panda

Birla Institute of Technology and Science

Arijit

Dr Arijit Mondal

Indian Institute of Technology Patna

Anindya S

Dr Anindya S Dhar

Indian Institute of Technology Kharagpur

Indrajit

Prof Indrajit Chakrabarti

Indian Institute of Technology Kharagpur

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Dr Om Shankar

Banaras Hindu University

Preetam

Dr Preetam Kumar

Indian Institute of Technology Patna

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Dr Rakesh Kumar

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Scholarly Work

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Scholarly Publications

CORDIC-based VLSI architecture for implementing kaiser-bessel window in real time spectral analysis

Open Access
Article
Journal of Signal Processing Systems. Year: 2014. Volume: 74 , Issue: 2 , Pages: 235-244 .
Authors: Ray K.C.;Dhar A.S.
DOI 10.1007/s11265-013-0781-z
4

FPGA implementation of stream cipher using Toeplitz Hash function

Open Access
Conference Paper
Year: 2014. Pages: 1834-1838 .
Authors: Pal S.;Pandian K.K.S.;Ray K.C.
DOI 10.1109/ICACCI.2014.6968290
5 7

Face recognition using PCA on FPGA based embedded platform

Open Access
Conference Paper
Year: 2013.
Authors: Endluri R.;Kathait M.;Ray K.C.
DOI 10.1109/CARE.2013.6733778
4 7

Implementation of Mellin transform using FPGA based embedded system platform

Open Access
Conference Paper
Year: 2012.
Authors: Kshitij;Rawoof S.;Ray K.
DOI 10.1109/ICPCES.2012.6508091
2 3

Hardware efficient design of variable length FFT processor

Open Access
Conference Paper
Year: 2011. Pages: 309-312 .
Authors: Gautam V.;Ray K.;Haddow P.
DOI 10.1109/DDECS.2011.5783102
5 14

FPGA implementation of discrete fractional fourier transform

Open Access
Conference Paper
Year: 2010.
Authors: Prasad M.;Ray K.;Dhar A.
DOI 10.1109/SPCOM.2010.5560491
13

CORDIC-based VLSI architecture for implementing Log Polar Transformation for real time applications

Open Access
Conference Paper
Year: 2010.
Authors: Ray K.;Shukla R.;Dhar A.
DOI 10.1109/ICCCNT.2010.5591772
1

FPGA implementation of running DFT for selective harmonics analysis

Open Access
Conference Paper
Year: 2010.
Authors: Tripathi P.;Chand R.;Mathur A.;Ray K.
DOI 10.1109/ICPCES.2010.5698718