Ministry of Education
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Dr Pullakandam Muralidhar

vidwan id: 62349
Male

Associate Professor, Department of Electronics and Communication Engineering
National Institute of Technology Warangal

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Expertise

  • Automation and Control Systems

Publications

Total Articles 58
Books 0
Proceedings 0

Publications

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Scopus

Citations 163
h-index 7

CrossRef

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Citations 62
h-index 4
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Bio

Embedded Systems;Digital System Design;FPGA based design;VLSI Architectures for Video Signal Processing Agorithms

Personal Details

  • Male
  • Associate Professor , National Institute of Technology Warangal
  • National Institute of Technology, Warangal
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Associate Professor Apr 1997 – Present
National Institute of Technology Warangal | Department of Electronics and Communication Engineering

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Co-Authors (2)

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Scholarly Work

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Scholarly Publications

FPGA-accelerated hybrid CNN-LSTM system for efficient EEG-based drowsiness recognition

Open Access
Article
Year: 2025. Volume: 81 , Issue: 3 .
Authors: Yanamala R.M.R.;Pullakandam M.
DOI 10.1007/s11227-025-06947-y
1

Embedded Hardware-Efficient FPGA Architecture for SVM Learning and Inference

Open Access
Article
IEEE Access. Year: 2025. Volume: 13 , Pages: 68930-68947 .
Authors: Shabarinath B.B.;Pullakandam M.
DOI 10.1109/ACCESS.2025.3562453

Approximate Successive Cancellation Decoder for Polar Codes

Open Access
Article
Defence Science Journal. Year: 2025. Volume: 75 , Issue: 2 , Pages: 206-214 .
Authors: Nandini J.;Pullakandam M.;Patri S.R.
DOI 10.14429/dsj.19961

Analysis of optical, structural, thermodynamics and electronic properties of silicon tetrafluoride using first-principles analysis under different hydrostatic pressure and composition

Open Access
Article
Physica Scripta. Year: 2025. Volume: 100 , Issue: 6 .
Authors: Sravana J.;Muralidhar P.;Padmanabha Reddy V.
DOI 10.1088/1402-4896/add39d

Low Latency Multikernel Polar Codes Using Approximate Processing Element

Open Access
Article
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS. Year: 2025.
Authors: Nandini J.;Muralidhar P.;Sreehari Rao P.
DOI 10.1002/cta.4446

FPGA Based LSTM Network: A Power and Resource Optimized Solution for Edge Computing

Open Access
Conference Paper
Year: 2024.
Authors: Muralidhar P.;Reddy Y.R.M.;Varsha P.S.S.;Sharanya V.S.;Prasanthi C.L.
DOI 10.1109/ICECSP61809.2024.10698315

High-Level Synthesis Based Hardware Accelerator for LSTM Neural Network

Open Access
Conference Paper
Year: 2024. Pages: 263-268 .
Authors: Shabarinath B.B.;Pullakandam M.;Adike A.;Kankari A.V.;Ramanakulam C.T.
DOI 10.1109/ICETCI62771.2024.10704150

Empowering edge devices: FPGA-based 16-bit fixed-point accelerator with SVD for CNN on 32-bit memory-limited systems

Open Access
Article
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS. Year: 2024. Volume: 52 , Issue: 9 , Pages: 4755-4782 .
Authors: Yanamala R.M.R.;Pullakandam M.
DOI 10.1002/cta.3957
5