Ministry of Education
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Dr Matcha Surya Prakash

vidwan id: 603422
Male

Assistant Professor (Grade-II), Department of Electronics and Communication Engineering
National Institute of Technology Calicut

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Expertise

  • Telecommunications

Publications

Total Articles 14
Books 0
Proceedings 0

Publications

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Scopus

Citations 93
h-index 5

CrossRef

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Citations 18
h-index 4
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Professional Recognition

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Bio

Electronics and Communication Engineering

Personal Details

  • Male
  • Assistant Professor (Grade-II) , National Institute of Technology Calicut
  • Department of Electronics and Communication Engineering, National Institute of Technology, Calicut
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Assistant Professor (Grade-II) Jun 2018 – Present
National Institute of Technology Calicut | Department of Electronics and Communication Engineering

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Co-Authors (3)

Anup

Dr Anup Aprem

National Institute of Technology Calicut

Praveen

Dr Praveen Sankaran

National Institute of Technology Calicut

Shaik Rafi

Prof Shaik Rafi Ahamed

Indian Institute of Technology Guwahati

Scholarly Work

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Scholarly Publications

Efficient Pipelined Hardware Architecture for Depth-Map-Based Image Dehazing System

Open Access
Article
Year: 2025. Volume: 33 , Issue: 4 , Pages: 1082-1093 .
Authors: Vidyamol K.;Prakash M.S.;Sankaran P.
DOI 10.1109/TVLSI.2024.3519262

A Novel Low-Complexity Approach to Drowsiness detection Using One Bit Bayes Classifier

Open Access
Conference Paper
Year: 2024. Pages: 58-65 .
Authors: Jones N.;Prakash M.S.;Aprem A.
DOI 10.1109/ICETCI62771.2024.10704120

Multiplier Design for the Modulo Set {2n- 1, 2n, 2n + 1- 1 } and Its Application in DCT for HEVC

Open Access
Conference Paper
Year: 2024. Volume: 1062 LNEE , Pages: 23-31 .
Authors: Kopperundevi P.;Prakash M.S.
DOI 10.1007/978-981-99-4444-6_3

A high throughput hardware architecture for deblocking filter in HEVC

Open Access
Article
Year: 2022. Volume: 100 .
Authors: Kopperundevi P.;Prakash M.S.;Ahamed S.R.
DOI 10.1016/j.image.2021.116517
4 7

Methods to develop high throughput hardware architectures for HEVC Deblocking Filter using mixed pipelined-block processing techniques

Open Access
Article
Microelectronics Journal. Year: 2022. Volume: 123 .
Authors: Kopperundevi P.;Prakash M.S.
DOI 10.1016/j.mejo.2022.105413
3

Residue adder design for the modulo set {2n- 1, 2n, 2n+1- 1} and its application in DCT architecture for HEVC

Open Access
Conference Paper
Year: 2022.
Authors: Kopperundevi P.;Prakash M.S.
DOI 10.1109/VLSISATA54927.2022.10046602

A Distributed Arithmetic based realization of the Least Mean Square Adaptive Decision Feedback Equalizer with Offset Binary Coding scheme

Open Access
Article
Year: 2021. Volume: 185 .
Authors: Prakash M.S.;Ahamed S.R.
DOI 10.1016/j.sigpro.2021.108083
5 7

A Hardware Architecture for Sample Adaptive Offset Filter in HEVC

Open Access
Conference Paper
Year: 2021. Pages: 181-186 .
Authors: Kopperundevi P.;Prakash M.S.
DOI 10.1109/DISCOVER52564.2021.9663590
3