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Dr Abhijit Karmakar

vidwan id: 599664
Male

Chief Scientific Officer, IDRP- AIoT and Applications
Indian Institute of Technology Jodhpur

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 79
Books 0
Proceedings 0

Publications

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Scopus

Citations 553
h-index 13

CrossRef

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Citations 222
h-index 9
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Professional Recognition

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Bio

VLSI Design; SoC Design; DSP; Speech & Audio Signal Processing; AI/ML based Image/Video Processing Applications

Personal Details

  • Male
  • Chief Scientific Officer , Indian Institute of Technology Jodhpur
  • NH- 62, Nagaur Road, Karwar
Ph.D.
Indian Institute of Technology Delhi 2007
M.Tech.
Other Institute 1995
B.E.
Jadavpur University 1993
Chief Scientific Officer Jan 2024 – Present
Indian Institute of Technology Jodhpur | IDRP- AIoT and Applications

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Scholarly Work

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Scholarly Publications

An efficient VLSI architecture for data encryption standard and its FPGA implementation

Open Access
Conference Paper
Authors: Pandey J.G.;Gurawa A.;Nehra H.;Karmakar A.

Speech Enhancement using Spectral Subtraction-type Algorithms: A Comparison and Simulation Study

Open Access
Conference Paper

An embedded framework for accurate object localization using center of gravity measure with mean shift procedure

Open Access
Conference Paper
Authors: Pandey J.G.;Karmakar A.;Shekhar C.;Gurunarayanan S.

An FPGA-Based Architecture for Local Similarity Measure for Image/Video Processing Applications

Open Access
Conference Paper
Authors: Pandey J.G.;Karmakar A.;Shekhar C.;Gurunarayanan S.

A perceptually motivated stationary wavelet packet filterbank using improved spectral over-subtraction for enhancement of speech in various noise environments

Open Access
Article

An FPGA-based architecture for kernel-smoothed local histogram computation

Open Access
conference-paper
Authors:

A perceptually motivated stationary wavelet packet filterbank using improved spectral over-subtraction for enhancement of speech in various noise environments

Open Access
journal-article

A Novel Architecture for FPGA Implementation of Otsu's Global Automatic Image Thresholding Algorithm

Open Access
conference-paper
Authors: