Ministry of Education
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Dr Dinesh Padole

vidwan id: 579789

Dean,
G.H. Raisoni College of Engineering ,Nagpur

Orchid Icon 0000-0001-8308-5393 Google Scholar Icon 24825156400 Google Scholar Icon Lo_5t3QAAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 47
Books 0
Proceedings 0

Publications

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Scopus

Citations 108
h-index 5

CrossRef

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Citations 13
h-index 3
Google Scholar

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Professional Recognition

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Community & Membership

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ISTE

2015
Life Member

IETE

2015
Life Member

IEEE

2004
Senior Member

Bio

Prof (Dr) Dinesh Padole has completed his graduation in 2001 as Electronics Engineer, Post Graduation in 2003 & awarded as Doctorate from RTM Nagpur University in year 2011. He is associated with various professional societies and recognized as senior member IEEE, life member ISTE, IETE. He is having more than 21 years of experience in teaching profession at undergraduate and Post-graduate level. Currently he is working as a Dean & Professor in Department of Electronics Engineering, G.H. Raisoni

Personal Details

  • Dean , G.H. Raisoni College of Engineering ,Nagpur
  • CRPF Gate-03, Digdoh Hills, Nagpur -440016
Ph.D
RTM Nagpur University 2011
Master of Technology (MTech)
Other Institute 2003
Bachelor of Engineering [B.E.]
RTM Nagpur University 2001
Dean Feb 2021 – Present
G.H. Raisoni College of Engineering ,Nagpur
Professor Jun 2003 – Feb 2021
G.H. Raisoni College of Engineering ,Nagpur

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Organisations (6+)

Birendra

Dr Birendra Kumar

Assistant Professor

Manthan

Prof Manthan Ghosh

Assistant Professor

Dinesh

Dr Dinesh Padole

Dean

Sachin

Dr Sachin Untawale

Director

PRAMOD

Dr PRAMOD WALKE

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Sulakshya

Mr Sulakshya Gaur

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Mr Amir Virani

Adhoc Faculty

Co-Authors (5)

A G

Prof A G Keskar

Visvesvaraya National Institute of Technology

Debabrata

Dr Debabrata Das

International Institute of Information Technology, Bangalore

Kantilal

Dr Kantilal Joshi

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Dr Preeti Bajaj

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Scholarly Work

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Design and Implementation of Modular Architecture for Programmable Digital System to Support Hardware and Software Co-design

University RTM Nagpur University, Nagpur
Year 2018

Strategies for Scalable Multicore System Design

University RTM Nagpur University, Nagpur
Year 2019

Design of Variability Aware Low Power Circuits for Portable Applications

University RTM Nagpur University, Nagpur
Year 2020

Modeling of Network on Chip Architecture for Quality of Service Performance

University RTM Nagpur University, Nagpur
Year 2021

Design of Multicore Reconfigurable System Based on Coarse Grain Reconfigurable Architecture

University RTM Nagpur University, Nagpur
Year 2022

Design And Development Of Approaches For Brain Signature Identification Using Non Invasive Method

University RTM Nagpur University, Nagpur
Year 2023

A FDSOI-MOSFET USING HIGH k MATERIAL FOR NANO SCALED CIRCUITS

Dinesh Padole
Engineering and Technology Patent No. : 2021107274 Filed : 01-11-2021
Published : N/A Granted

Design of Double Gate-FinFET with Parasitic Capacitance reduction using low k spacer

G H Raisoni College of En gineering
- Patent No. : 201721009720 Filed : 20-03-2017
Published : N/A Published

Scholarly Publications

Development of Feature based Hybrid Method for Brain Signature Identification

Open Access
Conference Paper
Year: 2019. Volume: 2019-November .
Authors:
DOI 10.1109/ICETET-SIP-1946815.2019.9091985
3

Signaling Protocol Specification for Signaling Approach-Based Virtual Output Queue Router Architecture

Open Access
book
Year: 2019.
Authors:

Design and implementation soil analyser using IoT

Open Access
conference-paper
Year: 2018.
Authors:

Message from organizing committee

Open Access
Editorial
Year: 2017. Pages: vii .
Authors: Ley M.;Pasupureddi V.;Köberle M.;Ofner E.;Paril C.;Sturm J.
DOI 10.1109/Austrochip.2016.007

Dual material pile gate approach for low leakage finfet

Open Access
journal-article
Year: 2017.
Authors:

Dual material pile gate approach for low leakage finfet

Open Access
Article
Year: 2017. Volume: 8 , Issue: 1 , Pages: 166-174 .
Authors: Chopade S.S.;Padole D.V.
DOI 10.14716/ijtech.v8i1.3699
1

Development of soft computing technique for classification of EEG signal

Open Access
Conference Paper
Year: 2017. Volume: 2018-January , Pages: 1-6 .
Authors:
DOI 10.1109/ICIIECS.2017.8276127
3

Design and implementation soil analyser using IoT

Open Access
Conference Paper
Year: 2017. Volume: 2018-January , Pages: 1-5 .
Authors: Sharma P.;Padole D.V.
DOI 10.1109/ICIIECS.2017.8275947
26