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Dr Roopa M

vidwan id: 503427
Female

Professor, Department of Electronics and Communication Engineering
Dayananda Sagar College of Engineering, BANGALORE

Expertise

  • Computer Science Information Systems

Publications

Total Articles 8
Books 0
Proceedings 0

Publications

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Scopus

Citations 12
h-index 2

CrossRef

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Citations 12
h-index 2
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Bio

Networks and Circuits

Personal Details

  • Female
  • Professor , Dayananda Sagar College of Engineering, BANGALORE
  • Department of Electronics and Communication Engineering, Dayananda Sagar College of Engineering
PhD
Gulbarga University 2016
Professor Mar 1992 – Present
Dayananda Sagar College of Engineering, BANGALORE | Department of Electronics and Communication Engineering

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Co-Authors (6)

Arunakumari

Dr Arunakumari B N

BMS Institute of Technology and Management

Druva Kumar

Dr Druva Kumar S

Dayananda Sagar College of Engineering, BANGALORE

P V

Dr P V Hunagund

Gulbarga University

Roopa

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R M

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Scholarly Work

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IOT BASED ROBOT FOR SANITIZATI ON

Dr. Shashidhar Rudregowda
Dr. Roopa Manibyrappa
Dr. Neha Sharma
Engineering and Technology Patent No. : 202316 Filed : 26-09-2022
Published : 13-01-2023 Published

Novel IoT Based Digital Cold Shaking Incubator

Dr. Neha Sharma
Dr. Chinmay Chakraborty
Dr. Shashidhar Rudregowda
Dr. Roopa Manibyrappa
Engineering and Technology Patent No. : 379748-001 Filed : 18-11-2021
Published : 17-02-2022 Published

Scholarly Publications

Object Distance Measurement Using Stereo Vision Image Processing

Open Access
book chapter

Advancing Medical Imaging: A Focus on Efficient Net for Brain Tumor Classification

Open Access
conference paper
Authors: 1) R. Shashidhar, R. Manasa, K. M. Megha, P. Priyanga, A. S. Manjunath and M. Roopa,

The Designing of Carbon Nanotube FET Based Encoder Using Ternary Logic

Open Access
Conference Paper

Indian Sign Language Recognition Using 2-D Convolution Neural Network and Graphical User Interface

Open Access
Article

Design and performance analysis of efficient hybrid mode multi-ported memory modules on FPGA platform

Open Access
Article

FPGA implementation of low power pipelined 32-bit RISC processor using clock gating

Open Access
Conference Paper
Authors: Shashidar R.;Kumar R.S.;Mahalingaswamy A.M.;Roopa M.

Uart controller as AMBA APB slave

Open Access
Conference Paper
Authors: Roopa M.;Vani R.M.;Hunagund P.V.
1

Design of low bandwidth peripherals using high performance bus architecture

Open Access
Conference Paper