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Dr Jalaja S

vidwan id: 455016
Female

Assistant Professor, Department of Electronics Engineering (VLSI Design and Technology)
Bangalore Institute of Technology, BANGALORE-560 004

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 31
Books 0
Proceedings 0

Publications

No publication activity to display at the moment.

Scopus

Citations 41
h-index 4

CrossRef

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Citations 36
h-index 4
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Professional Recognition

2022

Champion award

IEEE Conecct 2022 conference
2020

Best Researcher award

IEEE Bangalore Section
2021

Outstanding Volunteer award

IEEE CAS Bangalore Section
2025

CEDA Best Faculty Advisor

IEEE CEDA

Community & Membership

2023

IEEE Bangalore Section

Execom Member
2022

IEEE CAS Bangalore Section

Chair
2019

IEEE WIE Bangalore

Execom Member
2022

IEEE CAS Bangalore Section

Chair Elect
2024

IEEE CEDA Bangalore Section

treasurer

IEI

2016
Member

IEEE

2015
Professional Member

Bio

Low Power VLSI Architecture Design

Personal Details

  • Female
  • Assistant Professor , Bangalore Institute of Technology, BANGALORE-560 004
  • Department of Electronics Engineering (VLSI Design and Technology), Bangalore Institute of Technology
Ph.D
Other Institute 2019
Assistant Professor Dec 2003 – Present
Bangalore Institute of Technology, BANGALORE-560 004 | Department of Electronics Engineering (VLSI Design and Technology)
Associate Dean Oct 2021 – Jan 2025
Bangalore Institute of Technology, BANGALORE-560 004 | Department of Electronics Engineering (VLSI Design and Technology)

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Co-Authors (2)

Vijaya Prakash

Dr Vijaya Prakash A M

Bangalore Institute of Technology, BANGALORE-560 004

ROOPA

Dr ROOPA K M

Bangalore Institute of Technology, BANGALORE-560 004

Scholarly Work

TRANSFORMING ELDERLY CARE WITH UNIFIED WEARABLE HEALTH MONITORING AND INTELLIGENT MEDICATION MANAGEMENT TO ENHANCE OVERALL WELL-BEING SEAMLESSLY

Funding Agency: Karnataka State Council for Science and Technology

Guide

10,000

2024 - 2024

Completed
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A High Speed Memristor Digital Quadrature Clock Generator

Bangalore Institute of Technology
- Application No. : 202341032774 Filed : 01-06-2023
Published : N/A Published

Scholarly Publications

Design of low power based VLSI architecture for constant multiplier and high speed implementation using retiming technique

Open Access
Conference Paper
Authors: Jalaja S.;Prakash A.M.V.
1 1

Efficient Adaptive LMS Filter with Reduced Power

Open Access
article
Authors: KS Priyanka, S Jalaja

Design of low power based VLSI architecture for constant multiplier and high speed implementation using retiming technique

Open Access
Conference Paper
Authors: Jalaja S.;Prakash A.M.V.

Gsm based fully automated surveillance ensuring road safety and data acquisition for legal prosecution

Open Access
Article
Authors: Senthil Kumar R.;Sugavanam K.R.;Jalaja S.;Sri Krishna Kumar S.;Meenal A.L.;Chandni G.
2

High speed VLSI architecture for squaring algorithm using retiming approach

Open Access
Conference Paper
Authors: Jalaja S.;Vijaya Prakash A.

Robotic ARM for Sign Language Interpretation with sentiment analysis and auto-complete text features

Open Access
journal-article

VLSI architecture of FIR filter implementation using retiming technique

Open Access
journal-article
Authors: