Ministry of Education
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Dr Niranjan Maneklal Devashrayee

vidwan id: 44533
Male

Professor, Department of Computer Science and Engineering
Institute of Technology, Nirma University

Google Scholar Icon 36972993900 Google Scholar Icon 116uXfcAAAAJ

Expertise

  • Computer Science Software Engineering

Publications

Total Articles 89
Books 0
Proceedings 0

Publications

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Scopus

Citations 324
h-index 10

CrossRef

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Citations 181
h-index 8
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Professional Recognition

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Community & Membership

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Bio

Microelectronics, Low Power Design, Ic Fabrication And Technology, Semiconductor Device Physics, Vlsi Design And Technology, Physics

Personal Details

  • Male
  • Professor , Institute of Technology, Nirma University
  • Nirma University S.G. Highway
Post Doctoral
Other Institute 1992
Ph. D.
Kurukshetra University 1990
Professor Jul 2013 – Present
Institute of Technology, Nirma University | Department of Computer Science and Engineering
Scientist Sep 1979 – Nov -0001
Central Electronics Enginnering Research Institute

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Co-Authors (12)

Abhishek

Dr Abhishek Gor

Assistant Professor

Akash

Dr Akash Mecwan

Institute of Technology, Nirma University

Amisha

Dr Amisha Naik

Institute of Technology, Nirma University

Chetna

Dr Chetna Chauhan

Institute of Technology, Nirma University

Dharmesh

Dr Dharmesh Shah

Indrashil University

KRUTI

Dr KRUTI THAKORE

L.D.R.P. INSTITUTE OF TECH. & RESEARCH., GANDHINAGAR

Mamta

Dr Mamta Saiyad

Institute of Technology, Nirma University

Nagendra

Dr Nagendra Gajjar

Institute of Technology, Nirma University

Vijay

Dr Vijay Savani

Institute of Technology, Nirma University

Shruti

Dr Shruti Oza

Bharati Vidyapeeths College of Engineering, Lavale Address: lavale Taluka: Mulashi District: Pune

Tanuj

Dr Tanuj Gupta

Institute of Technology, Nirma University

Usha

Dr Usha Mehta

Institute of Technology, Nirma University

Scholarly Work

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Scholarly Publications

Low power and low jitter phase frequency detector for phase lock loop

Open Access
article
Year: 2011. Volume: 3 , Pages: 1998-2004 .
Authors: KP Thakore, HC Parmar, NM Devashrayee

Design and Development of Self Biased Cascode Circuit with its Implementation using 0.35

Open Access
article
Year: 2011.
Authors: DS Shukla, NM Devashrayee, A Naik

Artificial intelligence based scan vector reordering for capture power minimization

Open Access
Conference Paper
Year: 2011.
Authors: Mehta U.;Dasgupta K.;Devashrayee N.;Parmar H.
DOI 10.1109/NUiConE.2011.6153270
1 4

Suitability of various low-power testing techniques for IP core-based SoC: A survey

Open Access
Review
Year: 2011. Volume: 2011 .
Authors: Mehta U.;Dasgupta K.;Devashrayee N.
DOI 10.1155/2011/948926
1 4

Low power folding & interpolating ADC using 0.18μm technology

Open Access
Conference Paper
Year: 2010. Pages: 54-58 .
Authors: Oza S.;Devashrayee N.
DOI 10.1109/ACE.2010.40
1 2

Low voltage, high folding rate folding amplifier

Open Access
Conference Paper
Year: 2010. Pages: 899-902 .
Authors: Oza S.;Devashrayee N.
DOI 10.1145/1741906.1742112

Modified selective huffman coding for optimization of test data compression, test application time and area overhead

Open Access
Article
Year: 2010. Volume: 26 , Issue: 6 , Pages: 679-688 .
Authors: Mehta U.S.;Dasgupta K.S.;Devashrayee N.M.
DOI 10.1007/s10836-010-5183-6
8 11

A compact second generation current conveyor(CCII)

Open Access
Conference Paper
Year: 2010. Pages: 20-24 .
Authors: Naik A.P.;Devashrayee N.M.
DOI 10.1109/ARTCom.2010.108
3 5