Ministry of Education
Vidvan Image

Dr Shanthala S

vidwan id: 445165
Female

Professor, Department of Electronics and Telecommunication Engineering
Bangalore Institute of Technology, BANGALORE-560 004

Orchid Icon 0000-0002-3983-4788 Google Scholar Icon 26644593800 Google Scholar Icon dE64Ot0AAAAJ

Expertise

  • Telecommunications

Publications

Total Articles 36
Books 0
Proceedings 0

Publications

No publication activity to display at the moment.

Scopus

Citations 62
h-index 4

CrossRef

CrossRef Icon
Citations 18
h-index 3
Google Scholar

Loading Scholar statistics...

Professional Recognition

1994

Gold Medal

Institution of Engineers(Computer Division)

Community & Membership

2016

Board of Studies, Visvesvaraya Technological University

Member
2017

Board of Examiners, Visvesvaraya Technological University

Member
2016

Board of Studies, Visvesvaraya Technological University

Member
2018

Ambedkar Institute of Technology,Board of Studies, Nominee-Visvesvaraya Technological Univ

Member
2021

Board of Studies, Ambedkar Institute of Technology-Autonomous

Member
2021

Board of Examiners, BMSCE-Autonomous

Member

ISTE

1994
Member

IMAPS

Member

Bio

Digital Design, Operating Systems, Embedded Systems, Real Time Systems

Personal Details

  • Female
  • Professor , Bangalore Institute of Technology, BANGALORE-560 004
  • Department of Electronics and Telecommunication Engineering, Bangalore Institute of Technology
Ph D
Other Institute 2011
Professor Oct 1991 – Present
Bangalore Institute of Technology, BANGALORE-560 004 | Department of Electronics and Telecommunication Engineering
Assistant Professor Apr 1998 – Oct 1991
Bangalore Institute of Technology, BANGALORE-560 004
Lecturer Jun 1989 – Jun 1991
University of Visvesvaraya College of Engineering

Related Profiles

Experts (5793+)

View All
Pragati

Ms Pragati Mishra

Assistant Professor

Sridhar

Dr Sridhar Sekar

Assistant Professor

DEEPAK

Mr DEEPAK B N

N/A

Md

Dr Md Nadeem M

Assistant Professor

Rashmi

Rashmi Chandra

Assistant Professor

Anjali

Dr Anjali Jadhav

Doctor

Abhishek

Mr Abhishek Shukla

Assistant Professor (Grade-I)

N

Dr N PRAKASH

Assistant Professor

Mrinmoy

Mr Mrinmoy Sadhukhan

Research Scholar

Haranath

Mr Haranath Rakshit

Junior Research Fellow

Organisations (296+)

View All
Maya

Dr Maya B S

Associate Professor

Chaluvaraju

Dr Chaluvaraju B. V.

Assistant Professor

SHANKAR GOWDA

Dr SHANKAR GOWDA NAGARAJAIAH BEGUR

Professor

Gahan

Mr Gahan A V

Assistant Professor

Avinash

Prof Avinash S

Assistant Professor

Aswath

Dr Aswath M U

Principal

Ashok Kumar

Dr Ashok Kumar S

Assistant Professor

Asha

Prof Asha R

Assistant Professor

Asha

Dr Asha T

Professor

Shruthiba

Dr Shruthiba A

Assistant Professor

Co-Authors (7)

Sreemannarayan Y

Dr Sreemannarayan Y Kulkarni

B N M Institute of Technology, Bangalore

Anandraj

Mr Anandraj S N

Jawaharlal Nehru New College of Engineering

Anupama

Dr Anupama H

Bangalore Institute of Technology, BANGALORE-560 004

Anupama

Dr Anupama H S

BMS Institute of Technology and Management

B. Naresh Kumar

Dr B. Naresh Kumar Reddy

National Institute of Technology Tiruchirappalli

Cyril Prasanna Raj

Dr Cyril Prasanna Raj P

Camridge Institute of Technology, BANGALORE

Praveen

Dr Praveen J

GM Institute of Technology

Scholarly Work

Low Power VLSI Design

Funding Agency: VGST-Vision Group of Science and Technology

Principal Investigator

2,000,000

2014 - 2018

Completed

Compressive Sensing Based Image Reconstruction

University Visvesvaraya Technological University
Year 2023

Design of Low Power High Gain Low Noise Amplifier for UWB Applications

University Visvesvaraya Technological University, VTU Regional Office, Gulbarga
Year 2021

Power Analysis and Optimization Techniques for Energy efficient GPUs

University Visvesvaraya Technological University, VTU Regional Office, Gulbarga
Year 2019
No Data Found

There is currently nothing to display here.

Scholarly Publications

Area optimization of 8-bit multiplier using Gate Diffusion Input Logic

Open Access
article
Year: 2013. Volume: 2 , Pages: 57- 61 .
Authors: B. N. Manjunath Reddy Dr.S.Shanthala

Area optimization of 8-bit multiplier using gate diffusion input logic

Open Access
conference paper
Year: 2013.
Authors: B. N. Manjunath Reddy, H.N Sheshagiri, Dr.S.Shanthala

Experimental setup for power analysis of low power CMOS adders

Open Access
conference paper
Year: 2010.
Authors: S.Shanthala, Cyril P. Raj and Dr. S.Y.Kulkarni

Design and Analysis of Multi Vt and Variable Vt based Pipelined Adder for Low Power applications

Open Access
article
Year: 2010. Volume: 1 .
Authors: S. Shanthala, Cyril P. Raj and Dr. S.Y. Kulkarni
DOI 10.5121/vlsic2010.1404

VLSI design and implementation of Low Power MAC unit with Block Enabling technique

Open Access
article
Year: 2009. Volume: 30 , Pages: 620-630 .
Authors: S.Shanthala and Dr. S.Y.Kulkarni

High Speed and Low Power FPGA Implementation of FIR Filter for DSP Applications.

Open Access
article
Year: 2009. Volume: 31 , Pages: 19-28 .
Authors: S.Shanthala and Dr. S.Y.Kulkarni

Design and VLSI implementation of Pipelined Multiply Accumulate Unit

Open Access
conference paper
Year: 2009.
Authors: S. Shanthala and Dr. S.Y.Kulkarni

Benchmarking Low Power CMOS adders of different word length at 180nm

Open Access
conference paper
Year: 2009.
Authors: S.Shanthala and Dr. S.Y.Kulkarni