Ministry of Education
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Dr Kavitha T

vidwan id: 370993
Female

Assistant Professor, School of Electrical and Communication
Vel Tech Rangarajan Dr. Sagunthala R & D Institute of Science & Technology, Chennai

Orchid Icon 0000-0002-8676-4401 Google Scholar Icon 57202227891 Researcher Icon CAI-0215-2022 Google Scholar Icon wD8EUDcAAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 41
Books 0
Proceedings 0

Publications

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Scopus

Citations 50
h-index 4

CrossRef

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Citations 136
h-index 6
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Professional Recognition

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Community & Membership

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Bio

Optical Communication, VLSI

Personal Details

  • Female
  • Assistant Professor , Vel Tech Rangarajan Dr. Sagunthala R & D Institute of Science & Technology, Chennai
  • School of Electrical and Communication, Vel Tech Rangarajan Dr. Sagunthala R and D Institute of Science and Technology
PhD
Other Institute 2014
Assistant Professor Jun 2015 – Present
Vel Tech Rangarajan Dr. Sagunthala R & D Institute of Science & Technology, Chennai | School of Electrical and Communication

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Co-Authors (16)

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Dr Ashok Kumar N

Professor

Santhi Kiran

Santhi Kiran Bathula

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Dr Hemanand D

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Gopalakrishnan

Dr Gopalakrishnan S

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Mr Farithkhan A

Vel Tech Rangarajan Dr. Sagunthala R & D Institute of Science & Technology, Chennai

S V

Dr S V Hemanth

Hyderabad Institute of Technology & Management

Kanmani Pappa

Dr Kanmani Pappa C

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Dr Nagarajan P

S R M Institute of Science & Technology, Chennai

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Mr Vignesh Prasanna N

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Dr N Pandeeswari

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Dr Sakthisudhan K

Dr N G P Institute of Technology

Navalpur

Dr Navalpur Chinnappan Sendhil Kumar

Sri Indu College of Engineering and Technology

Shiyamala

Dr Shiyamala S

Vel Tech Rangarajan Dr. Sagunthala R & D Institute of Science & Technology, Chennai

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Shobana R

S A Engineering College

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Scholarly Work

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Scholarly Publications

FPGA implementation of arbiters algorithm for network-on-chip

Open Access
Article
ARPN Journal of Engineering and Applied Sciences. Year: 2016. Volume: 11 , Issue: 19 , Pages: 11451-11456 .
Authors: Kavitha T.;Shiyamala S.;Nagarajan P.
2

Efficient timing element design featuring low power VLSI applications

Open Access
Article
Year: 2016. Volume: 8 , Issue: 4 , Pages: 1696-1705 .
Authors: Nagarajan P.;Kavitha T.;Shiyamala S.
DOI 10.21817/ijet/2016/v8i4/160804409
2 3

Designing the antenna for ism band application

Open Access
Article
Year: 2015. Volume: 10 , Issue: 19 , Pages: 40197-40202 .
Authors: Kavitha T.;Shiyamala S.;Farithkhan A.;J.Gnana Arun J.
1

Generalization of clock gating logic using wide spread adapting technique

Open Access
Conference Paper
Year: 2015. Pages: 990-994 .
Authors: R. Kiruthika ., T. Kavitha ., V. Aravinda Rajan .,
DOI 10.1109/ECS.2015.7125063
1

Clock gating optimization technique using buffer gates

Open Access
Article
Year: 2015. Volume: 10 , Issue: 20 , Pages: 17940-17944 .
Authors: Kiruthika R.;Kavitha T.;Aravinda Rajan V.
1

A two dimensional threshold voltage analytical modelling and simulation of multigate MOSFETs for low power VLSI applications

Open Access
Article
Year: 2015. Volume: 10 , Issue: 20 , Pages: 17355-17359 .
Authors: Abrose Banu N.;Kavitha T.

Variable separation method based analytical model for surface potential profile of triple material double gate MOSFETs

Open Access
Conference Paper
Year: 2014.
Authors: N. Abrose Banu ., T. Kavitha ., K. Ashik Ilahi .,
DOI 10.1109/ICSEMR.2014.7043618
2 4

A modified efficient traffic scheduling algorithm for routing in optical WDM mesh networks

Open Access
Article
Year: 2013. Volume: 34 , Issue: 3 , Pages: 193-200 .
Authors: T. Kavitha ., V. Rajamani .,
DOI 10.1515/joc-2013-0014
6 4