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Dr Rajesh Akula

vidwan id: 370518
Male

Associate Professor, Department of Computer Science and Engineering
ACE Engineering college

Expertise

  • Telecommunications

Publications

Total Articles 45
Books 0
Proceedings 0

Publications

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Scopus

Citations 0
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Professional Recognition

2022

IOT

NPTEL
2022

INDUSTRIAL 4.0 AND IOT

NPTEL
2024

DBMS

NPTEL
2024

CN & IP

NPTEL

Community & Membership

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LMISTE

2013
LIFEMEMBER

Bio

VLSI SYSTEM DESIGN

Personal Details

  • Male
  • Associate Professor , ACE Engineering college
  • Department of Electronics & Communication Engineering
PhD
ACE Engineering college 2022
Associate Professor Jun 2013 – Present
ACE Engineering college | Department of Computer Science and Engineering
Associate Professor Jun 2005 – May 2013
TKR COLLEGE OF ENGINEERING AND TECHNOLOGY (II SHIFT POLYTECHNIC) (Id: S-16533)

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Co-Authors (1)

B L

Dr B L RAJU

Stanley College of Engineering and Technology for Women

Scholarly Work

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Effective Management Analysis of Signal Coverage and Novel Design of Triangular Patch Antenna for Quasi Elliptic Band Pass Response.

ACE ENGINEERING COLLEGE
- Patent No. : 202041020290, Filed : 14-05-2020
Published : 29-05-2020 Published

Scholarly Publications

“Design of High Performance Phase Locked Loop for Clock Synchronization”

Open Access
conference paper
Authors: A.Rajesh

“Design and Analysis of High Performance and Low Power Current Mode Logic CMOS”

Open Access
conference paper
Authors: A.Rajesh

Design and Analysis of High Performance and Low Power Current Mode Logic CMOS

Open Access
editorial
Authors: A Rajesh, BL Raju, K Chenna Kesava Reddy

A High Performance Clock Distribution Network for System on Chip

Open Access
editorial
Authors: KCK Reddy A Rajesh, BL Raju

Dual-VDD, Single-Frequency Clocking Methodology for System on Chip

Open Access
editorial
Authors: A Rajesh, BL Raju, K Chenna Kesava Reddy

Low Power Multi GHz Circuit Techniques in VLSI

Open Access
conference paper
Authors: KCK Reddy A Rajesh, BL Raju

Implementation of Turbo Decoder Using Soft Input Soft Output (SISO) Iterative Decoder–

Open Access
conference proceedings
Authors: A.Rajesh

“Design of a Differential Amplifier using Current Mirror as Active Load”

Open Access
conference proceedings
Authors: A.Rajesh