Ministry of Education
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Dr Silpa Kesav Velagaleti

vidwan id: 367888
Female

Assistant Professor, Department of Electronics and Communication Engineering
CVR College of Engineering

Orchid Icon 0000-0002-1127-8601 Google Scholar Icon 55803936700 Researcher Icon HTR-6804-2023 Google Scholar Icon mZOhVjAAAAAJ

Expertise

  • Telecommunications

Publications

Total Articles 10
Books 0
Proceedings 0

Publications

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Scopus

Citations 17
h-index 3

CrossRef

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Citations 4
h-index 1
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Professional Recognition

2000

Prathibha Award

Government of Andhrapradesh

Community & Membership

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IETE

Life Member

Bio

Digital Electronics, Analog And Mixed Signal Design, Digital Integrated Circuit Design

Personal Details

  • Female
  • Assistant Professor , CVR College of Engineering
  • Department of Electronics and Communication Engineering, C V R College of Engineering
Ph.D
Other Institute 2022
Assistant Professor Jun 2011 – Present
CVR College of Engineering | Department of Electronics and Communication Engineering

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Scholarly Work

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SUCCESSIVE APPROXIMATION REGISTER-ANALOG TO DIGITAL CONVERTER FOR WIRELESS IMPLANTABLE APPLICATIONS

1)SILPA KESAV VELAGALETI 2)NAYANATHARA KOTIKALAPUDI SATTIRAJU 3)BANGALORE KOTA MADHAVI
Engineering and Technology Application No. : 202041056496 A Filed : 25-12-2020
Published : 01-01-2021 Published

Scholarly Publications

Design of 8-bit Register Using OAI Logic at Subthreshold

Open Access
Conference Paper
Year: 2023. Pages: 1117-1122 .
Authors: D Lahari ., SilpaKesav Velagaleti ., Valli Nikitha .,
DOI 10.1109/IITCEE57236.2023.10091008

A Low Power APB with an Area Efficient Structure

Open Access
Conference Paper
Year: 2023.
Authors: Velagaleti S.
DOI 10.1109/INOCON57975.2023.10100979

An Integrated Security System for Bank Lockers Using Gated D-Latch

Open Access
Conference Paper
Year: 2023.
Authors: Velagaleti S.
DOI 10.1109/INOCON57975.2023.10101343

Design of 8-bit ALU Using OAI Logic at Subthreshold Voltage

Open Access
Conference Paper
Year: 2023.
Authors: Velagaleti S.K.;Lahari D.
DOI 10.1109/INOCON57975.2023.10100982

A 9.38-bit, 422nW, high linear SAR-ADC for wireless implantable system

Open Access
Article
Year: 2021. Volume: 19 , Issue: 2 , Pages: 547-555 .
Authors: Silpa Kesav Velagaleti ., Nayanathara K. S. ., Madhavi B. K. .,
DOI 10.12928/TELKOMNIKA.v19i2.18318
5

Design considerations of high linear SAR-ADC for wireless implantable systems

Open Access
Article
Year: 2021.
Authors: Silpa kesav Velagaleti ., K.S. Nayanathara ., B.K. Madhavi .,
DOI 10.1016/j.matpr.2020.10.488
3

Impact on the Physical Design flow, due to Repositioning the Macros in the Floorplan stage of Video decoder at Lower Technologies

Open Access
Conference Paper
Year: 2019.
Authors: Vishnu uppula ., Silpa kesav .v ., Balaji vura .,
DOI 10.1109/DISCOVER47552.2019.9007953
2

A Sample and Hold with Clock Booster for Improved Linearity

Open Access
Conference Paper
Year: 2019. Pages: 1058-1062 .
Authors: SilpaKesav Velagaleti ., K.S. Nayanathara ., B.K. Madhavi .,
DOI 10.1109/SPIN.2019.8711660
5