Ministry of Education
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Dr G Snehalatha

vidwan id: 367670
Female

Assistant Professor (Senior Grade), Department of Electronics and Communication Engineering
CVR College of Engineering

Expertise

  • Telecommunications

Publications

Total Articles 7
Books 0
Proceedings 0

Publications

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Bio

Vlsi Analog Design

Personal Details

  • Female
  • Assistant Professor (Senior Grade) , CVR College of Engineering
  • Department of Electronics and Communication Engineering, C V R College of Engineering
M.Tech
Other Institute 2014
B.Tech
Other Institute 2012
Assistant Professor (Senior Grade) Jun 2015 – Present
CVR College of Engineering | Department of Electronics and Communication Engineering
Assistant Professor Jun 2015 – Jun 2015
CVR College of Engineering | Department of Electronics and Communication Engineering

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Co-Authors (1)

Selvakumar

Dr Selvakumar J

S R M Institute of Science & Technology, Chennai

Scholarly Work

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Scholarly Publications

Comparative Analysis of Phase Locked Loop with Different Phase Frequency Detectors using 90nm Technology

Open Access
Conference Paper
Year: 2023.
Authors: G. Snehalatha ., J. Selvakumar ., Esther Rani Thuraka .,
DOI 10.1109/GCITC60406.2023.10425951

Design of 8-bit Low power & High performance SAR ADC using current steering DAC

Open Access
Conference Paper
Year: 2023.
Authors: G. Snehalatha ., J. Selvakumar ., EstherRani Thuraka .,
DOI 10.1109/GCITC60406.2023.10426165

Comparative Study and Review on Successive Approximation/Stochastic Approximation Analog to Digital Converters for Biomedical Applications

Open Access
Conference Paper
Year: 2022.
Authors: Snehalatha G.;Selvakumar J.;Thuraka E.R.
DOI 10.1109/CONIT55038.2022.9847947

Stochastic Flash Analog to Digital Converter Compared with Conventional Resistor ladder Flash Analog to Digital Converter

Open Access
INPROCEEDINGS
Year: 2022. Pages: 1-6 .
Authors: Snehalatha, G. and Anjikumar, M.
DOI 10.1109/INCOFT55651.2022.10094440

The Design of High Speed and Low Power Dual Tail Comparator using Power Gating Technique

Open Access
article
Year: 2017. Volume: 4 .
Authors: G SNEHALATHA

Design and Implementation of Low Power VCO Based ADC using TIQ Comparator in Cadence using 45nm Technology

Open Access
article
Year: 2017. Volume: 4 .
Authors: G.SNEHALATHA

Implementation of High Speed Secure Communication Between Multiple FPGA Systems Using RTOS

Open Access
article
Year: 2017. Volume: 7 .
Authors: G SNEHALATHA