Ministry of Education
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Dr Rohit Lorenzo

vidwan id: 363799
Male

Associate Professor, School of Electronics Engineering
Vellore Institute of Technology (VIT-AP) University, Andhra Pradesh

Orchid Icon 0000-0003-2044-5798 Google Scholar Icon 55220726400 Researcher Icon ADV-7462-2022 Google Scholar Icon BjCLFUgAAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 24
Books 0
Proceedings 0

Publications

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Scopus

Citations 296
h-index 9

CrossRef

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Citations 157
h-index 6
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Professional Recognition

2017

Gowri Memorial Award IETE-2018

IETE
2022

Best Paper Award

2nd IEEE International conference on emerging frontiers in electrical and electronics technologies
2022

IET Premium Award 2022

IET

Community & Membership

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IEEE

2021
IEEE Senior Member

Bio

Low Power VLSI Design, Memory Design and CMOS VLSI Design

Personal Details

  • Male
  • Associate Professor , Vellore Institute of Technology (VIT-AP) University, Andhra Pradesh
  • Inavolu, Amaravati, Andhra Pradesh, India
Post Doc
Other Institute 2020
PhD
Other Institute 2017
Associate Professor Aug 2022 – Present
Vellore Institute of Technology (VIT-AP) University, Andhra Pradesh | School of Electronics Engineering
Assistant Professor - Senior Scale Jan 2020 – Jul 2022
Vellore Institute of Technology (VIT-AP) University, Andhra Pradesh | School of Electronics Engineering
Assistant Professor Jul 2017 – Apr 2018
National Institute of Technology, Delhi | Department of Electronics and Communication Engineering
Assistant Professor Aug 2016 – Jun 2017
Meerut Institute of Engineering and Technology | Electronics and Communication Engineering
Assistant Professor Jul 2011 – Jul 2012
Invertis University, Bareily
Assistant Professor Jan 2011 – Jun 2011
National Institute of Technology Kurukshetra | Department of Electronics and Communication Engineering
Assistant Professor Nov 2008 – Dec 2010
Invertis University, Bareily

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Co-Authors (5)

Nikhil

Dr Nikhil Raj

LNM Institute of Information Technology, Jaipur

Mukku Pavan Kumar

Mukku Pavan Kumar 20PHD7075

Raghu Institute Of Technology

Roy Paily

Prof Roy Paily Palathinkal

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Sachin

Dr Sachin Agrawal

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Saurabh

Dr Saurabh Chaudhury

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Scholarly Work

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Scholarly Publications

Comprehensive Analysis of a Power-Efficient 1-Bit Hybrid Full Adder Cell

Open Access
Article
Wireless Personal Communications. Year: 2023. Volume: 129 , Issue: 2 , Pages: 1097-1111 .
Authors: Kanojia A.;Agrawal S.;Lorenzo R.
DOI 10.1007/s11277-023-10177-x
6 7

A review on radiation-hardened memory cells for space and terrestrial applications

Open Access
Article
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS. Year: 2023. Volume: 51 , Issue: 1 , Pages: 475-499 .
Authors: Pavan Kumar, Mukku and Lorenzo, Rohit
DOI 10.1002/cta.3429
13

Low Power and High-Performance Associative Memory Design

Open Access
Conference Paper
Year: 2022.
Authors: Lorenzo, Rohit and Vajhala, Sai Naga Snigdha and Kumar, Mukku Pavan
DOI 10.1109/ICEFEET51821.2022.9848289
3

Low Power 8T SRAM with High Stability and Bit Interleaving Capability

Open Access
Conference Paper
Year: 2022.
Authors:
DOI 10.1109/ICEFEET51821.2022.9848038

Half-selection disturbance free 8T low leakage SRAM cell

Open Access
Article
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS. Year: 2022. Volume: 50 , Issue: 5 , Pages: 1557-1575 .
Authors: Lorenzo R.;Paily R.
DOI 10.1002/cta.3232
20 22

A 1.2V, Radiation Hardened 14T SRAM Memory Cell for Aerospace Applications

Open Access
Conference Paper
Year: 2022.
Authors: Kumar, Mukku Pavan and Lorenzo, Rohit
DOI 10.1109/SILCON55242.2022.10028951
5

Correction to: Improvement of Ion, Electric Field and Transconductance of Trigate FinFET by 5nm Technology (Silicon, (2022), 14, 13, (7889-7900), 10.1007/s12633-021-01536-z)

Open Access
Erratum
Year: 2022. Volume: 14 , Issue: 14 , Pages: 9193 .
Authors:
DOI 10.1007/s12633-022-02133-4

Performance Analysis of DMG-GOS Junctionless FinFET with high-k Spacer

Open Access
Conference Paper
Year: 2022.
Authors:
DOI 10.1109/SILCON55242.2022.10028902