Ministry of Education
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Dr Pallabi Sarkar

vidwan id: 343883
Female

Assistant Professor, School of Electrical and Electronics Engineering
VIT Bhopal University, Sehore

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Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 18
Books 0
Proceedings 0

Publications

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Scopus

Citations 76
h-index 4

CrossRef

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Citations 59
h-index 4
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Professional Recognition

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Community & Membership

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Bio

Digital VLSI Design and Optimization, Digital Design with FPGA , Algorithm based design on CAD for VLSI and ASIC Designing, Design Space Exploration and High Level Synthesis.

Personal Details

  • Female
  • Assistant Professor , VIT Bhopal University, Sehore
  • VIT Bhopal University, Kothrikalan
PhD
Other Institute 2020
Assistant Professor Dec 2018 – Present
VIT Bhopal University, Sehore | School of Electrical and Electronics Engineering

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Co-Authors (3)

Anirban

Dr Anirban Sengupta

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Scholarly Work

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Scholarly Publications

GA driven integrated exploration of loop unrolling factor and datapath for optimal scheduling of CDFGs during high level synthesis

Open Access
Conference Paper
Year: 2015. Volume: 2015-June , Issue: June , Pages: 75-80 .
Authors: Sarkar P.;Sengupta A.;Naskar M.K.
DOI 10.1109/CCECE.2015.7129163
5 6

A multi parametric optimization based novel approach for an efficient design space exploration for ASIC design

Open Access
Conference Paper
Year: 2013. Pages: 868-873 .
Authors: Tulasi Krishna Parvathaneni ., Priyam Sachdeva ., Suraj Kumar Dhanuka ., Mohit Gagrani ., Pallabi Sarkar .,
DOI 10.1109/ICACCI.2013.6637290
1 2

Rapid search of Pareto fronts using D-logic exploration during multi-objective tradeoff of computation intensive applications

Open Access
Conference Paper
Year: 2013. Pages: 113-122 .
Authors: Sengupta A.;Mishra V.K.;Sarkar P.
DOI 10.1109/ASQED.2013.6643573
1 2

Rapid exploration of integrated scheduling and module selection in high level synthesis for application specific processor design

Open Access
Article
Microprocessors and Microsystems. Year: 2012. Volume: 36 , Issue: 4 , Pages: 303-314 .
Authors: Sengupta A.;Sedaghat R.;Sarkar P.
DOI 10.1016/j.micpro.2012.02.015
5 5

A multi structure genetic algorithm for integrated design space exploration of scheduling and allocation in high level synthesis for DSP kernels

Open Access
Article
Swarm and Evolutionary Computation. Year: 2012. Volume: 7 , Pages: 35-46 .
Authors: Sengupta A.;Sedaghat R.;Sarkar P.
DOI 10.1016/j.swevo.2012.06.003
28 34

Integrated scheduling, allocation and binding in high level synthesis for performance-area tradeoff of digital media applications

Open Access
Conference Paper
Year: 2011. Pages: 000533-000537 .
Authors: Sengupta A.;Sedaghat R.;Sarkar P.;Sehgal S.
DOI 10.1109/CCECE.2011.6030508
1 2

Priority function based power efficient rapid design space exploration of scheduling and module selection in high level synthesis

Open Access
Conference Paper
Year: 2011. Pages: 000538-000543 .
Authors: Sengupta A.;Sedaghat R.;Sarkar P.;Sehgal S.
DOI 10.1109/CCECE.2011.6030509
1

Integrated design space exploration based on power-performance trade-off using genetic algorithm

Open Access
Conference Paper
Year: 2011. Pages: 77-81 .
Authors: Sengupta A.;Sedaghat R.;Sarkar P.
DOI 10.1145/2007052.2007068
1