Ministry of Education
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Dr Bhupendra Singh Reniwal

vidwan id: 328770
Male

Assistant Professor, Department of Electrical Engineering
Indian Institute of Technology Jodhpur

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Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 31
Books 0
Proceedings 0

Publications

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Scopus

Citations 165
h-index 7

CrossRef

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Citations 109
h-index 6
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Community & Membership

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Bio

AI, Hardware Accelerators and IMC Circuits & Architectures Design: Variation/Radiation Aware Preferential Design of Embedded Memory for Energy Efficient and Robust Space Applications

Personal Details

  • Male
  • Assistant Professor , Indian Institute of Technology Jodhpur
  • N.H.- 65 Nagaur Road, Karwar
Ph.D.
Indian Institute of Technology Indore 2017
M.Tech.
SGSITS INDORE 2009
B.E.
SGSITS INDORE 2006
Assistant Professor Oct 2022 – Present
Indian Institute of Technology Jodhpur | Department of Electrical Engineering

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Co-Authors (6)

Ambika Prasad

Dr Ambika Prasad Shah

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Scholarly Work

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Scholarly Publications

Design of Radiation Hardened 12T SRAM with Enhanced Reliability and Read/Write Latency for Space Application

Open Access
Conference Paper
Year: 2023. Volume: 2023-January , Pages: 104-108 .
Authors: Ansari S.M.S.;Kavitha S.;Reniwal B.S.;Vishvakarma S.K.
DOI 10.1109/VLSID57277.2023.00034
1 3

Design and Analysis of Multibit Multiply and Accumulate (MAC) unit: An Analog In-Memory Computing Approach

Open Access
Conference Paper
Year: 2023. Volume: 2023-January , Pages: 109-114 .
Authors: Ananthanarayanan S.;Reniwal B.S.;Upadhyay A.
DOI 10.1109/VLSID57277.2023.00035
13

Energy Effcient and Reliable Embedded Nanoscale SRAM Design

Open Access
Book
Year: 2023. Pages: 1-206 .
Authors: Reniwal B.S.;Singh P.;Shah A.P.;Vishvakarma S.K.
DOI 10.1201/9781003213451
1 1

Guest Editorial : 26th International Symposium on VLSI Design and Test 2022

Open Access
Conference Paper
Year: 2023. Volume: 5 .
Authors: Shah A.P.;Reniwal B.S.
DOI 10.1016/j.memori.2023.100072

Enhancing Linearity and Efficiency in Multi-Bit MAC Computation for Convolution in DNNs Using SRAM Array

Open Access
Conference Paper
Year: 2023. Pages: 26-28 .
Authors: Pathloth V.;Soundrapandiyan K.;Reniwal B.S.
DOI 10.1109/PRIMEAsia60757.2023.00016

An Approach Towards Analog In-Memory Computing for Energy-Efficient Adder in SRAM Array

Open Access
Conference Paper
Year: 2022. Volume: 1687 CCIS , Pages: 262-274 .
Authors: Kavitha S.;Vishvakarma S.K.;Reniwal B.S.
DOI 10.1007/978-3-031-21514-8_23
1

Energy Efficient, Hamming Code Technique for Error Detection/Correction Using In-Memory Computation

Open Access
Conference Paper
Year: 2021.
Authors: Mythrai ;Pragna ;Kavitha K.;Singh P.;Shah A.P.;Vishwakarma S.K.;Reniwal B.S.
DOI 10.1109/VDAT53777.2021.9601068
1 5

An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAM

Open Access
Article
Year: 2019. Volume: 38 , Issue: 4 , Pages: 1482-1505 .
Authors: Reniwal B.S.;Vijayvargiya V.;Singh P.;Yadav N.K.;Vishvakarma S.K.;Dwivedi D.
DOI 10.1007/s00034-018-0934-1
4 4