Dr RITESH KUMAR JAISWAL

vidwan id: 327530

Male

Assistant Professor, Department of Electronics and Communication Engineering
JSS Academy of Technical Education, Noida

0000-0001-7751-7380 Google Scholar Icon

57195944039

Expertise

Electrical and Electronic Engineering

Publications

Total Articles 10

Books 0

Proceedings 0

Publications

Scopus

Citations 16

h-index 2

CrossRef

Citations 15

h-index 3

Google Scholar

Loading Scholar statistics...

Professional Recognition

No Data Found

There is currently nothing to display here.

Community & Membership

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

Bio

VLSI Design, RNS based Circuit

Personal Details

Male
Assistant Professor , JSS Academy of Technical Education, Noida
LACHCHIPUR GORAKHNATH, GORAKHPUR

PhD

Motilal Nehru National Institute of Technology Allahabad 2019

Assistant Professor May 1985 – Present

JSS Academy of Technical Education, Noida | Department of Electronics and Communication Engineering

Related Profiles

Experts (19623+)

View All

Assistant Professor

Assistant Professor

N/A

Assistant Professor

Assistant Professor

Doctor

Assistant Professor (Grade-I)

Dr N PRAKASH

Assistant Professor

Mr Mrinmoy Sadhukhan

Research Scholar

Mr Haranath Rakshit

Junior Research Fellow

Organisations (170+)

View All

Assistant Professor

Dean

Assistant Professor

Assistant Professor

Professor

Assistant Professor

Assistant Professor

Assistant Professor

Assistant Professor

Mr Birendra Kumar Verma

Assistant Professor

Co-Authors (4)

Prof Ghanshyam Singh

N/A

Dr Niraj Pratap Singh

National Institute of Technology Kurukshetra

Dr R.A. Mishra

Motilal Nehru National Institute of Technology Allahabad

Dr Raj Kumar

N/A

Scholarly Work

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

Scholarly Publications

Perspective and Opportunities of Modulo 2^n− 1 Multipliers in Residue Number System: A Review

Open Access

article

Journal of Circuits, Systems and Computers. Year: 2020. Volume: 29 , Pages: 2030008(1-24) .

Authors: Kumar, Raj, Ritesh Kumar Jaiswal, and Ram Awadh Mishra

10.1142/S0218126620300081

"Design and Analysis of Selfbiased OTA for Low-Power Applications

Open Access

conference paper

Year: 2020.

Authors: Manikanta, G., R. A. Mishra, N. A. Srivastava, and R. K. Jaiswal

Outage Probability of Device-to-Device Communication Underlaying Cellular Network over Nakagami/Rayleigh Fading Channels

Open Access

Conference Paper

Year: 2019. Volume: 2019-November .

Authors: Singh I.;Jaiswal R.K.;Kumar V.;Verma R.;Singh N.P.;Singh G.

10.1109/ICETET-SIP-1946815.2019.9092306

Efficient Design for High Speed and Low Area Reverse Converter for Moduli Set {2^{n}, 2^{2n}-1, 2^{2n}-{1)}

Open Access

conference paper

Year: 2019.

Authors: Kumar, Raj, Ritesh Kumar Jaiswal, and Ram Awadh Mishra

Linearity Enhancement of CMOS OTA for High Performance Applications

Open Access

Conference Paper

Year: 2018.

Authors: Prasad N.;Srivastava N.A.;Jaiswal R.K.;Mishra R.A.

10.1109/UPCON.2018.8596855

Area Efficient Memoryless Reverse Converter for New Four Moduli Set { 2n - 1, 2n - 1, 2n + 1, 2 2n + 1 - 1 }

Open Access

Article

Year: 2018. Volume: 27 , Issue: 5 .

Authors: Jaiswal R.K.;Kumar R.;Mishra R.A.

10.1142/S0218126618500755

Performance evaluation of digital and RNS based filter for fast DSP processors

Open Access

Conference Paper

Year: 2017. Volume: 2018-January , Pages: 1-4 .

Authors: Jaiswal R.K.;Bagre M.;Mishra R.A.

10.1109/ICETCCT.2017.8280309

Area Efficient Sparse Modulo 2^n-3 Adder

Open Access

article

Year: 2016. Volume: 7 , Pages: 4024-4035 .

Authors: Jaiswal, Ritesh Kumar, Chatla Naveen Kumar, and Ram Awadh Mishra

« Previous
Next »

Showing 1 to 8 of 10 results