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Mr Mayank Chaturvedi

vidwan id: 297463
Male

Research Scholar,
Griffith University

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 56
Books 0
Proceedings 0

Publications

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Scopus

Citations 206
h-index 8

CrossRef

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Citations 17
h-index 3
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Professional Recognition

2020

Griffith University International Post Graduate Research Scholarship

Griffith University
2020

Griffith University Post Graduate Research Scholarship

Griffith University
2018

Outstanding Researcher

Graphic Era University

Community & Membership

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Bio

Semiconductor devices characterization, Silicon-carbide MOS capacitors, and MOSFETs

Personal Details

  • Male
  • Research Scholar , Griffith University
  • Lawrence Close, Robertson QLD, Australia
M. Tech.
Other Institute 2014
Research Scholar Feb 2020 – Present
Griffith University

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Organisation (1)

Mayank

Mr Mayank Chaturvedi

Research Scholar

Co-Authors (6)

Abhijit

Mr Abhijit Singh Bhakuni

Graphic Era Hill University, Dehradun

Govind Singh

Mr Govind Singh Jethi

Graphic Era Hill University, Dehradun

Parvesh

Dr Parvesh Saini

Graphic Era University, Dehradun

Brijesh

Dr Brijesh Prasad

Graphic Era University, Dehradun

Sheetal

Sheetal Kapoor

Tulas Institute

Vikas

Dr Vikas Rathi

Graphic Era University, Dehradun

Scholarly Work

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Scholarly Publications

Effect of variation in filter coefficients for different PID controller structures on performance of SOPDT process

Open Access
Conference Paper

Integral error based controller design & performance analysis for a TOPDT process

Open Access
Conference Paper

Simulation studies for delay effect on stability of a canonical tank process

Open Access
Conference Paper

Effect of delay approximation using Pade technique on controller performance designed for a SOPDT model

Open Access
Conference Paper

Design of time-delay compensator for a FOPDT process model

Open Access
Conference Paper

Controller performance analysis for a delayed process based on integral error performance indices

Open Access
Article

Controller design for a TOPDT process model using integral error-based tuning techniques

Open Access
Conference Paper

Controller capability comparison for a delayed first-order process model

Open Access
Conference Paper