Dr Avinash Lahgere
vidwan id: 295256
Assistant Professor (Grade-I), Department of Electrical Engineering
Indian Institute of Technology Kanpur
Expertise
- Electrical and Electronic Engineering
Publications
Publications
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Scopus
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8
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Citations
143
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6
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Bio
Semiconductor Devices, Compact Modeling, Emerging CMOS Devices, Emerging Volatile-Nonvolatile Memory, Variation, PPA Benchmarking, Analog/RF, and Neuromorphic computing.
Personal Details
- Male
- Assistant Professor (Grade-I) , Indian Institute of Technology Kanpur
- IIT Gate, IIT Kanpur, Kalyanpur, Kanpur, Uttar Pradesh, India
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Co-Authors (8)
Indian Institute of Technology Jodhpur
Indian Institute of Technology Kanpur
Malaviya National Institute of Technology Jaipur
Indian Institute of Technology Patna
Indian Institute of Technology Kanpur
Indian Institute of Technology Patna
National Institute of Technology Srinagar
National Institute of Technology Rourkela
Scholarly Work
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Scholarly Publications
1-T Capacitorless DRAM Using Laterally Bandgap Engineered Si-Si:C Heterostructure Bipolar I-MOS for Improved Sensing Margin and Retention Time
Open AccessThe charge plasma n-p-n impact ionization MOS on FDSOI technology: Proposal and analysis
Open Access
10.1109/TED.2016.2622741
11
20
1-T Capacitorless DRAM Using Bandgap-Engineered Silicon-Germanium Bipolar I-MOS
Open Access
10.1109/TED.2017.2669096
14
36
A Tunnel Dielectric-Based Junctionless Transistor with Reduced Parasitic BJT Action
Open Access
10.1109/TED.2017.2713423
13
17
Dopingless ferroelectric tunnel FET architecture for the improvement of performance of dopingless n-channel tunnel FETs
Open AccessElectrically doped dynamically configurable field-effect transistor for low-power and high-performance applications
Open AccessPVT-Aware Design of Dopingless Dynamically Configurable Tunnel FET
Open Access
10.1109/TED.2015.2446615
47
83