Ministry of Education
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Dr Muralidharan Dakshinamoorthy

vidwan id: 293723
Male

Assistant Professor, Department of Information Technology
Shanmugha Arts, Science, Technology & Reserch Academy (SASTRA), Thanjavur

Orchid Icon 0000-0001-7378-6866 Google Scholar Icon 57191368547 Google Scholar Icon 5XaH8oAAAAAJ

Expertise

  • Computer Science Information Systems

Publications

Total Articles 25
Books 0
Proceedings 0

Publications

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Scopus

Citations 24
h-index 3

CrossRef

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Citations 5
h-index 1
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Professional Recognition

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Community & Membership

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Bio

Digital VLSI Design.

Personal Details

  • Male
  • Assistant Professor , Shanmugha Arts, Science, Technology & Reserch Academy (SASTRA), Thanjavur
  • SASTRA Deemed University, Tirumalaisamudram
PhD
Other Institute 2018
Assistant Professor Jun 2006 – Present
Shanmugha Arts, Science, Technology & Reserch Academy (SASTRA), Thanjavur | Department of Information Technology

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Co-Authors (3)

Brindha

Dr Brindha G R

Shanmugha Arts, Science, Technology & Reserch Academy (SASTRA), Thanjavur

Sasikumar

Dr Sasikumar A

S R M Institute of Science & Technology, Chennai

Muthaiah

Prof Muthaiah Rajappa

Shanmugha Arts, Science, Technology & Reserch Academy (SASTRA), Thanjavur

Scholarly Work

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Scholarly Publications

Fixed point multi-bit approximate adder based convolutional neural network accelerator for digit classification inference

Open Access
Article
Journal of Intelligent and Fuzzy Systems. Year: 2020. Volume: 39 , Issue: 6 , Pages: 8521-8528 .
Authors: Nagarajan M.;Sasikumar A.;Muralidharan D.;Rajappa M.
DOI 10.3233/JIFS-189169
1 4

Missing values treatment and feature reduction analysis to enhance classification

Open Access
Article
Year: 2020. Volume: 16 , Issue: 2 , Pages: 211-216 .
Authors: Muralidharan D.;Renuka K.;Jaswant M.;Karthikeyan J.;Brindha G.R.
DOI 10.3844/JCSSP.2020.211.216

Region-aware trace signal selection using machine learning technique for silicon validation and debug

Open Access
Article
Year: 2019. Volume: 120 , Issue: 1 , Pages: 25-43 .
Authors: Agalya R.;Muthaiah R.;Muralidharan D.
DOI 10.32604/cmes.2019.05616
1

A survey on various VLSI architectures of carry select adder

Open Access
Article
Year: 2019. Volume: 8 , Issue: 5 , Pages: 470-474 .
Authors: Giri N.;Muralidharan D.
1

Power enhanced CHIPPER based bufferless network-on-chip router

Open Access
Article
Journal of Advanced Research in Dynamical and Control Systems. Year: 2018. Volume: 10 , Issue: 8 Special Issue , Pages: 1464-1469 .
Authors: Muralidharan D.;Muthaiah R.

A low power vernier Time-To-Digital converter using adiabatic logic

Open Access
Conference Paper
Year: 2017. Pages: 90-94 .
Authors: Mahima R.;Muralidharan D.
DOI 10.1109/NETACT.2017.8076747
1 1

Pipelined chipper based noc for performance enhancement

Open Access
Conference Paper
Year: 2017. Pages: 95-98 .
Authors: Sivaranjani U.;Muralidharan D.;Muthaiah R.
DOI 10.1109/NETACT.2017.8076748

Bus Based Synchronization Method for CHIPPER Based NoC

Open Access
Article
Scientific Programming. Year: 2016. Volume: 2016 .
Authors: Muralidharan D.;Muthaiah R.
DOI 10.1155/2016/1907521