Ministry of Education
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Dr Sivanandam K

vidwan id: 292052
Male

Assistant Professor, Department of Electronics and Communication Engineering
M Kumarasamy College of Engineering, Karur

Orchid Icon 0000-0002-5661-6109 Google Scholar Icon 55844139700 Researcher Icon E-2488-2017 Google Scholar Icon kN5AgDYAAAAJ

Expertise

  • Telecommunications

Publications

Total Articles 11
Books 0
Proceedings 0

Publications

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Scopus

Citations 61
h-index 4

CrossRef

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Citations 42
h-index 3
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Professional Recognition

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Community & Membership

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Bio

VLSI Design

Personal Details

  • Male
  • Assistant Professor , M Kumarasamy College of Engineering, Karur
  • Thalavapalayam
PhD
Anna University 2021
Assistant Professor Jun 2021 – Present
M Kumarasamy College of Engineering, Karur | Department of Electronics and Communication Engineering
Assistant Professor Jun 2021 – Present
M Kumarasamy College of Engineering, Karur | Department of Electronics and Communication Engineering

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Co-Authors (9)

Ahalya

Dr Ahalya N

M S Ramaiah Institute of Technology, Bangalore

Kumar

Prof Kumar P

KS Rangasamy College of Technology (Autonomous)

Parthibaraj

Mr Parthibaraj Anguraj

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Ramya

Ms Ramya R

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Scholarly Work

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Scholarly Publications

Design of Area Efficient Unified Binary/Decimal Adder/Subtractor Using Triple Carry Based Prefix Adder

Open Access
Conference Paper
Year: 2022. Pages: 1720-1725 .
Authors: Krishnan T.;Anguraj P.;Saravanan S.;Vidya A.;Sivanandam K.
DOI 10.1109/ICACCS54159.2022.9785045
3

Impact of ANN in Revealing of Viral Peptides

Open Access
Article
BioMed Research International. Year: 2022. Volume: 2022 .
Authors: Rajkumar M.;Bhukya S.N.;Ahalya N.;Elumalai G.;Sivanandam K.;Almutairi K.M.A.;Alonazi W.B.;Soma S.R.;Urugo M.M.
DOI 10.1155/2022/7760734
2 2

Detection and classification of fruit diseases using image processing cloud computing

Open Access
conference paper
Year: 2020.
Authors: Ramya R.;Kumar P.;Sivanandam K.;Babykala M.
DOI 10.1109/ICCCI48352.2020.9104139
6 9

Design and performance analysis of reconfigurable modified Vedic multiplier with 3-1-1-2 compressor

Open Access
Article
Microprocessors and Microsystems. Year: 2019. Volume: 65 , Pages: 97-106 .
Authors: Sivanandam K.;Kumar P.
DOI 10.1016/j.micpro.2019.01.002
25 27

Low-power high-performance multitransform architecture using run-time reconfigurable adder for FPGA and ASIC implementation

Open Access
Conference Paper
Year: 2018. Volume: 732 , Pages: 63-72 .
Authors: Sivanandam K.;Kumar P.
DOI 10.1007/978-981-10-8533-8_7
2

Low adaptation delay in fixed point LMS adaptive filter for DSP applications

Open Access
Conference Paper
Year: 2016. Pages: 690-694 .
Authors: Sridhar M.;Sivanandam K.
DOI 10.1109/WiSPNET.2016.7566221
1

Design and implementation of 16 bit systolic multiplier using modular shifting algorithm

Open Access
Conference Paper
Year: 2016. Pages: 532-537 .
Authors: Jayarajkumar S.;Sivanandam K.
DOI 10.1109/ICONSTEM.2016.7560950
1 2

Run time reconfigurable modified vedic multiplier for high speed multimedia applications

Open Access
Conference Paper
Year: 2015. Pages: 2109-2113 .
Authors: Sivanandam K.;Kumar P.
8