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Dr Siddalingappa Kerur

vidwan id: 258574
Male

Associate Professor, Department of Electronics and Communication Engineering
S D M College of Engg. & Technology, DHARWAD

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 27
Books 0
Proceedings 0

Publications

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Scopus

Citations 19
h-index 3

CrossRef

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Citations 9
h-index 2
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Professional Recognition

2010

LETTER OF APPRECIATION

SDMCET DHARWAD
2010

Best Sub centre, and Chairman

IETE HQ,NEWDELHI
2020

NATIONAL EXECUTIVE COUNCIL MEMBER,ISTE

ISTE,NEWDELHI
2014

Best Sub centre, and Chairman

IETE HQ,NEWDELHI

Community & Membership

2021

UBA

CO-ORDINATOR
2012

DUGC

MEMBER SECRETARY

IEEE

2013
Member

IEI

2009
MEMBER

VSI

2005
Member

IETE

2004
MEMBER

ISTE

1999
MEMBER

Bio

Electrical and Electronic Engineering

Personal Details

  • Male
  • Associate Professor , S D M College of Engg. & Technology, DHARWAD
  • SDM College of Engineering and Technology, Kalaghatagi Road
PhD
Other Institute 2016
M.E
Other Institute 1998
B.E
Other Institute 1995
Associate Professor Oct 1999 – Present
S D M College of Engg. & Technology, DHARWAD | Department of Electronics and Communication Engineering

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Co-Authors (11)

Girish V

Dr Girish V Attimarad

K S School of Engineering and Management

Jayashree

Dr Jayashree Nidagundi

Associate Professor

Kalmeshwar

Dr Kalmeshwar Hosur

S D M College of Engg. & Technology, DHARWAD

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Pratima Manhas

Dr Pratima Manhas Fet

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Preeti

Prof Preeti Bellerimath

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Dr Karthik Rajendra

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Shrikanth

Mr Shrikanth Shirakol

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Siddalingesh

Prof Siddalingesh Navalgund

S D M College of Engg. & Technology, DHARWAD

Scholarly Work

REFRESHER PROGRAM

Funding Agency: AICTE-ISTE

PROGRAM CO-ORDINATOR

RS.2.79LAKHS

2020 - 2021

Completed

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University SDMCET, Dharwad
Year 2021
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Scholarly Publications

Implementation of Vedic Multiplier for Digital Signal Processing

Open Access
conference proceedings
Authors: Prakash Narchi, Siddalingesh S Kerur, Jayashree C Nidagundi, Harish M Kittur, Girish V A

RK Bathija RS Meena S. Sarkar

Open Access
article
Authors: Sahu, Rajesh

Design and Simulation of 16 Bit Vedic Multiplier using Urdhva Tiryakbhyam Algorithm

Open Access
article
Authors: Agarwal, Aditya and Verma, Jay Prakash Narayan and Srivastava Nishant