Ministry of Education
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Mr Shrikanth Shirakol

vidwan id: 258277
Male

Assistant Professor, Department of Electronics and Communication Engineering
S D M College of Engg. & Technology, DHARWAD

Orchid Icon 0000-0001-9970-6924 Google Scholar Icon 57201773982 Researcher Icon ACY-3003-2022 Google Scholar Icon SpeO3PsAAAAJ

Expertise

  • Electrical and Electronic Engineering

Publications

Total Articles 10
Books 0
Proceedings 0

Publications

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Professional Recognition

2015

NET Qualified

UGC, New Delhi

Community & Membership

2022

BOS, Dept. of Electronics, Karnataka University, Dharwad

Member
2023

BOE, Dept. of ECE, GIT, Belagavi

Member
2023

BOE, Dept. of Electronics, Karnataka University, Dharwad

Member

Indian Society for Technical Education

2021
Member

The Institution of Engineers (India)

2021
Member

The Institution of Electronics and Telecommunication Engineers

2013
Associate Member

Bio

VLSI, Signal Processing, Embedded Systems

Personal Details

  • Male
  • Assistant Professor , S D M College of Engg. & Technology, DHARWAD
  • SDM College of Engineering and Technology, Kalaghatagi Road
Master of Technology
Other Institute 2011
Bachelor of Engineering
Other Institute 2009
Assistant Professor Jan 2012 – Present
S D M College of Engg. & Technology, DHARWAD | Department of Electronics and Communication Engineering

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Co-Authors (2)

Siddalingappa

Dr Siddalingappa Kerur

S D M College of Engg. & Technology, DHARWAD

Kotresh

Mr Kotresh Marali

S D M College of Engg. & Technology, DHARWAD

Scholarly Work

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Scholarly Publications

An Area-Efficient JK Flip-Flop-Based Phase Detector for Phase Measurement System Based on FPGA

Open Access
Conference Paper
Year: 2022. Volume: 355 , Pages: 589-595 .
Authors:
DOI 10.1007/978-981-16-8512-5_62

ARCHITECTURAL DESIGN AND OPTIMIZATION OF DISTRIBUTED ARITHMETIC BASED 2-D DISCRETE COSINE TRANSFORM

Open Access
article
ICTACT Journal on Microelectronics. Year: 2022. Volume: 08 , Pages: 1275-1282 .
Authors: Shrikanth Shirakol and S.S. Kerur
DOI 10.21917/ijme.2022.0220

FPGA-Based Implementation of Digital Filters for Image Denoising

Open Access
Conference Paper
Year: 2021. Volume: 750 , Pages: 155-166 .
Authors: Shrikanth K. Shirakol ., Veerayya Hiremath ., S. S. Kerur .,
DOI 10.1007/978-981-16-0336-5_14

Performance optimization of dual stage algorithm for lossless data compression and decompression

Open Access
Article
Year: 2018. Volume: 7 , Issue: 2 , Pages: 127-130 .
Authors: Shrikanth Shirakol ., Akshata Koparde ., Sandhya . ., Shravan Kulkarni ., Yogesh Kini .,
DOI 10.14419/ijet.v7i2.21.11849

Edge Detection Algorithm Using PI-Computer

Open Access
article
Year: 2016. Volume: 6 , Pages: 79-82 .
Authors: Shivakumar U. Hiremath ., Shashank P. Baannadabavi ., Shreyansh Kabbin ., Shrikanth Shirakol .,
DOI 10.9756/BIJRCE.8206

Design and Synthesis of Systolic Array Architecture for Matrix Multiplication

Open Access
article
Year: 2016. Volume: 6 , Pages: 717-721 .
Authors: Shreedevi M Ganji, Shrikanth K Shirakol

Design, Implementation and Performance Analysis of 1-Bit CMOS Full Adder using GDITL

Open Access
conference proceedings
Year: 2014.
Authors: Umesh, Kotresh E. Marali, Shirkanth Shirakol

Design and implementation of 16-bit carry skip adder using efficient low power high performance full adders

Open Access
inproceedings
Year: 2014. Pages: 782--790 .
Authors: Shirakol, Shrikanth K and Kulkarni, Ajaykumar S and Akash, AF and Amminabhavi, Nikhil N and Parvati, Aditya