Ministry of Education
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Dr Rajendar Sandiri

vidwan id: 241986
Male

Dean, Electronics and Communication Engineering
Vardaman College of Engineering, Rangareddy

Orchid Icon 0000-0002-8145-1852 Google Scholar Icon 57190793245 Google Scholar Icon Mj_ItlEAAAAJ

Expertise

  • Telecommunications

Publications

Total Articles 22
Books 0
Proceedings 0

Publications

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Scopus

Citations 11
h-index 2

CrossRef

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Citations 19
h-index 2
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Professional Recognition

2021

Best Teaching Award

Asian Education Awards
2021

Research Excellence Award

Institute of Scholars

Community & Membership

2018

Examination Committee

Member
2020

Planning and Evaluation Committee of VCE

Member
2019

IQAC of Vardhaman College of Engineering

Member
2021

Academic Council of Vardhaman College of Engineering

Member Secretary
2014

Board of Studies, ECE

Member

Institute of Electrical and Electronics Engineers (IEEE)

2015
Member

Institution of Electronics and Telecommunication Engineers (IETE)

2014
Life Member

Indian Society for Technical Education (ISTE)

2014
Life Member

Bio

Modeling and Optimization of High-Speed VLSI Interconnects, Low Power and High-Performance Arithmetic Circuits and Architectures for VLSI, Engineering Education Research and Outcome Based Education, TLP and Assessment, Curriculum Design and Development

Personal Details

  • Male
  • Dean , Vardaman College of Engineering, Rangareddy
  • Kacharam Village, Shamshabad
Ph.D
Other Institute 2021
M.Tech
Other Institute 2009
B.Tech
Other Institute 2003
Dean Jun 2005 – Present
Vardaman College of Engineering, Rangareddy | Electronics and Communication Engineering

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Co-Authors (3)

Nagarjuna

Mr Nagarjuna Malladhi

Vardaman College of Engineering, Rangareddy

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Scholarly Work

Bibliometric Study of Paradigms to Stimulating Research through University-Industry Partnerships in India

Funding Agency: Department of Science and Technology

Principal Investigator

23,88,286

2020 - Ongoing

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Live Streaming of High Dynamic Range Videos for IPTV from IOT Cloud Computing Hub using Efficient Block Based Codes (EBCC)

Dr. M. R. Arun
Rajendar Sandiri and others
Engineering and Technology Application No. : 202141004394 Filed : 01-02-2021
Published : 12-02-2021 Published

Multistage Filtration of Industrial Wastewater with Automated Supervisory Control through IOT Cloud Computing Sensor Network System (ICCSNS)

Dr. M. R. Arun
Rajendar Sandiri and others
Engineering and Technology Patent No. : 202041057084 Filed : 30-12-2020
Published : 08-01-2021 Published

Scholarly Publications

Impact of device and dynamic variations on functional crosstalk noise and delay in inductively coupled interconnects

Open Access
article
Year: 2020.
Authors: S. Rajendar, P. Chandrasekhar, M. Asha Rani
DOI 10.1016/j.matpr.2020.11.494
1

Effect of Repeater Size and Temperature on Functional Crosstalk Noise and Delay in Capacitively Coupled Interconnects

Open Access
article
Year: 2020. Volume: 63 .
Authors: S. Rajendar, P. Chandrasekhar, M. Asha Rani

CSI-SRAM: Design of CMOS Schmitt trigger inverter based SRAM cell for low power applications

Open Access
Conference Paper
Year: 2018. Pages: 2113-2117 .
Authors: Shalini C.;Rajendar S.
DOI 10.1109/ICECDS.2017.8389823
2 2

Design of low power memory architecture using 4T content addressable memory cell

Open Access
Conference Paper
Year: 2017.
Authors: Ramakrishna P.;Rajendar S.;Malladhi N.
DOI 10.1109/ICACCS.2017.8014618
3 2

A novel high performance design of memory architecture using modified 4T CAM cell

Open Access
Conference Paper
Year: 2017. Pages: 272-277 .
Authors: Rajendar S.;Ramakrishna P.
DOI 10.1109/ICICCT.2017.7975202
2 1

A novel low power dynamic memory architecture using single supply 3t gain cell

Open Access
Conference Paper
Year: 2017. Pages: 440-443 .
Authors: Nagarjuna M.;Mamatha G.;Rajendar S.
DOI 10.1109/IACC.2017.0097
2 1

Design of a parallel self-timed adder by using transmission gate logic style

Open Access
Conference Paper
Year: 2017.
Authors: Bhargavi S.;Rajendar S.
DOI 10.1109/ICACCS.2017.8014638
1

Novel Low Power Design techniques for Read-Out Path Circuit in a Register File

Open Access
article
Year: 2016. Volume: 23 .
Authors: M. Nagarjuna, D. Mahesh Babu, S. Rajendar