Dr SUDHAKAR ALLURI

vidwan id: 233082

Male

Associate Professor, Department of Electronics and Communication Engineering
CMR Institute of Technology

0000-0002-5406-2878 Google Scholar Icon

57192554677 Researcher Icon

ABC-2932-2021 Google Scholar Icon

LTHuH6oAAAAJ

Expertise

Telecommunications

Publications

Total Articles 42

Books 0

Proceedings 0

Publications

Scopus

Citations 13

h-index 2

CrossRef

Citations 13

h-index 2

Google Scholar

Loading Scholar statistics...

Professional Recognition

No Data Found

There is currently nothing to display here.

Community & Membership

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

Bio

Electronics and Communications Engineering

Personal Details

Male
Associate Professor , CMR Institute of Technology
CMR Institute of Technology, Kandlakoya Village, Medchal Rd

Ph.D

Osmania University 2018

Associate Professor Jun 2018 – Present

CMR Institute of Technology | Department of Electronics and Communication Engineering

Related Profiles

Experts (5793+)

View All

Assistant Professor

Assistant Professor

N/A

Assistant Professor

Assistant Professor

Doctor

Assistant Professor (Grade-I)

Dr N PRAKASH

Assistant Professor

Mr Mrinmoy Sadhukhan

Research Scholar

Mr Haranath Rakshit

Junior Research Fellow

Organisations (272+)

View All

Mr RAVIKUMAR BADAVATH

Assistant Professor

BOMMAREDDY SINDHUJA

Assistant Professor

Ms Baddam Soumya

Assistant Professor

L Bharani

Assistant Professor

Mr Bharath Kasubosula

Assistant Professor

Mr Balamurali Krishna KV

Assistant Professor

Associate Professor

Assistant Professor

Assistant Professor

Assistant Professor

Co-Authors (4)

MAMATHA DYAVA

CMR Institute of Technology

Mr Kumaraswamy Gajula

CMR Institute of Technology

Prof Rajendra Naik Bhukya

Osmania University

Dr SUDHAKAR ALLURI

Associate Professor

Scholarly Work

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

Scholarly Publications

Design and Estimation of Power, Delay and Area for Parallel Adder in VLSI Circuits using 45nm Technology

Open Access

article

Year: 2017. Volume: 7 , Pages: 56-65 .

Authors: Sudhakar Alluri, M Dasharatha, B Rajendra Naik, NSS Reddy

A NOVEL DESIGN OF POWER AND AREA OPTIMIZATION FOR 4X4 BOOTH MULTIPLIER USING 180NM TECHNOLOGY

Open Access

article

Year: 2017. Volume: 2 , Pages: 61-67 .

Authors: SUDHAKAR ALLURI, B.RAJENDRA NAIK, N.S.S.REDDY,RAVINDRA KUMAR NIRANJAN

Design of Second Order Adiabatic Logic for Energy Dissipation in VLSI CMOS Circuits

Open Access

article

Year: 2017. Volume: 1 , Pages: 14-24 .

Authors: Sudhakar Alluri, B Rajendra Naik, NSS REDDY

Design of low power high speed full adder cell with XOR/XNOR logic gates

Open Access

Conference Paper

Year: 2016. Pages: 565-570 .

Authors: Alluri, S.;Dasharatha, M.;Rajendra Naik, B.;Reddy, N.S.S.

10.1109/ICCSP.2016.7754203

Mapping of five input wallace tree using cadence tool for low power, low area and high speed

Open Access

Conference Paper

Year: 2016. Pages: 304-310 .

Authors: Sudhakar Alluri ., B. Rajendra Naik ., N. S. S. Reddy .,

10.1109/ICCSP.2016.7754144

A Novel Design of Power and Area Optimized 12 bit Carry Select adder using Cadence 45nm Technology

Open Access

conference paper

Year: 2016. Volume: 2 , Pages: 269-276 .

Authors: Sudhakar Alluri,B.Rajendra naik,N.S.S.REDDY,Ravindra Kumar Niranjan

Power and Area Optimization for 4 bit Arithmetic and Logic Units (ALUs) using 45nm Technology

Open Access

conference paper

Year: 2016. Volume: 2 , Pages: 377-382 .

Authors: Sudhakar Alluri,B.Rajendra naik,N.S.S.REDDY,Ravindra Kumar Niranjan

Design and Estimation of Power Optimization and Area for 4 bit Carry look ahead adder using Cadence

Open Access

conference proceedings

Year: 2016. Volume: 2 , Pages: 0565-0570 .

Authors: Sudhakar Alluri, B Rajendra Naik, NSS REDDY

Showing 33 to 40 of 42 results